avr: started working on hw interface for uart0.
This commit is contained in:
Martin Preuss
@@ -16,7 +16,7 @@
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; PB0 2 13 PA0 ATTN0
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; PB1 3 12 PA1 TXD0 (UART0)
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; /RESET PB3 4 11 PA2 RXD0 (UART0)
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; LED PB2 5 10 PA3 ATTN1
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; LED PB2 5 10 PA3
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; 1-wire PA7 6 9 PA4 RXD1 (UART1) [SCK, PRG]
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; [MOSI,PRG] SDA (I2C) PA6 7 8 PA5 TXD1 (UART1) [MISO, PRG]
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; -------
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@@ -51,33 +51,18 @@
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; ---------------------------------------------------------------------------
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; COM module
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.equ COM_BIT_LENGTH = 52000 ; 104000ns=9600, 52000ns=19200, 26000ns=38400
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.equ COM_HALFBIT_LENGTH = 26000 ; see https://de.wikipedia.org/wiki/Universal_Asynchronous_Receiver_Transmitter
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.equ COM_DATA_DDR = DDRA
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.equ COM_DATA_INPUT = PINA
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.equ COM_DATA_OUTPUT = PORTA
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.equ COM_DATA_PIN = PORTA2
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.equ COM_ATTN_DDR = DDRA
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.equ COM_ATTN_INPUT = PINA
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.equ COM_ATTN_OUTPUT = PORTA
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.equ COM_ATTN_PIN = PORTA0
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.equ COM_IRQ_ADDR_ATTN = PCMSK0
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.equ COM_IRQ_BIT_ATTN = PCINT0 ; bit 7 in PCMSK0
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.equ COM_IRQ_BIT_ATTN = PCINT0 ; bit 0 in PCMSK0
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.equ COM_IRQ_GIFR_ATTN = PCIF0
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.equ COM_IRQ_GIMSK_ATTN = PCIE0
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; ---------------------------------------------------------------------------
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; LCD module
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.equ LCD_TWI_ADDRESS = 0x3c
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; ---------------------------------------------------------------------------
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; 1-Wire Master
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;
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@@ -3,12 +3,13 @@
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<gwbuild>
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<extradist>
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comonuart0.asm
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defs.asm
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init_uart1.asm
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lowlevel.asm
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lowlevel_uart0.asm
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lowlevel_uart1.asm
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msglevel_recv.asm
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msglevel_send.asm
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m_lowlevel_uart.asm
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ttyonuart1.asm
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</extradist>
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</gwbuild>
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366
avr/modules/uart_hw/comonuart0.asm
Normal file
366
avr/modules/uart_hw/comonuart0.asm
Normal file
@@ -0,0 +1,366 @@
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; ***************************************************************************
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; copyright : (C) 2025 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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.equ COMONUART0_IFACENUM = 1
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.dseg
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comOnUart0_iface: .byte UART_HW_IFACE_SIZE
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.cseg
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; ---------------------------------------------------------------------------
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; @routine ComOnUart0_Init @global
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;
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; @clobbers Y (R16, R17, X)
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ComOnUart0_Init:
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ldi yl, LOW(comOnUart0_iface)
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ldi yh, HIGH(comOnUart0_iface)
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rcall UART_HW_Interface_Init ; (R16, R17, X)
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rcall UART_HW_Uart0_Init ; (R16, R17, X)
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ldi r16, COMONUART0_IFACENUM
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std Y+NET_IFACE_OFFS_IFACENUM, r16
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ComOnUart0_Periodically @global
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;
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; @clobbers R16, Y
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ComOnUart0_Periodically:
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ldi yl, LOW(comOnUart0_iface)
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ldi yh, HIGH(comOnUart0_iface)
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ldd r16, Y+NET_IFACE_OFFS_READTIMER
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inc r16
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breq ComOnUart0_Periodically_l1
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std Y+NET_IFACE_OFFS_READTIMER, r16
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ComOnUart0_Periodically_l1:
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ldd r16, Y+NET_IFACE_OFFS_WRITETIMER
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inc r16
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breq ComOnUart0_Periodically_l2
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std Y+NET_IFACE_OFFS_WRITETIMER, r16
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ComOnUart0_Periodically_l2:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ComOnUart0_RxCharIsr @global @isr
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;
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; @clobbers none
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ComOnUart0_RxCharIsr:
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push r15
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in r15, SREG
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push r16
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push r17
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push r18
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push r24
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push r25
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push xl
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push xh
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push yl
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push yh
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ldi yl, LOW(comOnUart0_iface)
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ldi yh, HIGH(comOnUart0_iface)
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rcall UART_HW_Uart0_RxCharIsr ; (R16, R17, R18, R24, R25, X)
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pop yh
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pop yl
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pop xh
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pop xl
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pop r25
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pop r24
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pop r18
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pop r17
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pop r16
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out SREG, r15
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pop r15
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reti
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; @end
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; ---------------------------------------------------------------------------
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; @routine ComOnUart0_TxUdreIsr @global @isr
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;
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; @clobbers none
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ComOnUart0_TxUdreIsr:
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push r15
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in r15, SREG
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push r16
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push r17
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push xl
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push xh
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push yl
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push yh
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ldi yl, LOW(comOnUart0_iface)
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ldi yh, HIGH(comOnUart0_iface)
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rcall UART_HW_Uart0_TxUdreIsr ; (R16, R17, X)
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pop yh
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pop yl
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pop xh
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pop xl
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pop r17
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pop r16
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out SREG, r15
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pop r15
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reti
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; @end
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; ---------------------------------------------------------------------------
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; @routine ComOnUart0_TxCharIsr @global @isr
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;
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; @clobbers none
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ComOnUart0_TxCharIsr:
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push r15
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in r15, SREG
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push r16
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push r17
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push r18
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push xl
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push xh
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push yl
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push yh
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ldi yl, LOW(comOnUart0_iface)
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ldi yh, HIGH(comOnUart0_iface)
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rcall UART_HW_Uart0_TxCharIsr ; (R16, R17, R18, X)
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pop yh
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pop yl
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pop xh
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pop xl
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pop r18
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pop r17
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pop r16
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out SREG, r15
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pop r15
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reti
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; @end
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; ---------------------------------------------------------------------------
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; @routine ComOnUart0_Run @global
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;
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; @clobbers all
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ComOnUart0_Run:
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push r15
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in r15, SREG
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cli
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ldi yl, LOW(comOnUart0_iface)
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ldi yh, HIGH(comOnUart0_iface)
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rcall comOnUart0RunWriteModes
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rcall comOnUart0RunReadModes
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pop r15
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out SREG, r15
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunWriteModes
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;
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; @clobbers all, !Y
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comOnUart0RunWriteModes:
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ldd r16, Y+UART_HW_IFACE_OFFS_WRITEMODE ; handle write functions
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cpi r16, UART_HW_WRITEMODE_IDLE
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breq comOnUart0RunWriteIdle
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cpi r16, UART_HW_WRITEMODE_WRITING
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breq comOnUart0RunWriting
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cpi r16, UART_HW_WRITEMODE_WAITBUFFEREMPTY
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breq comOnUart0RunWaitBufferEmpty
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cpi r16, UART_HW_WRITEMODE_WRITEBUFFEREMPTY
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breq comOnUart0RunWriteBufferEmpty
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunIdle
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;
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; @clobbers
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comOnUart0RunWriteIdle:
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ldd r16, Y+NET_IFACE_OFFS_WRITETIMER
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cpi r16, TTYONUART1_MSG_INTERVAL ; wait a bit between messages
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brcs comOnUart0RunWriteIdle_end
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rcall NET_Interface_GetNextOutgoingMsgNum ; (R17, R18, X)
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brcc comOnUart0RunWriteIdle_end
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rcall NET_Buffer_Locate ; (R17)
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brcc comOnUart0RunWriteIdle_end
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rcall ComOnUart0_SendBuffer ; (R16, R17)
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comOnUart0RunWriteIdle_end:
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ret
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunWriting
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;
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; @clobbers
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comOnUart0RunWriting:
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; TODO: check for timeout etc.
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunWaitBufferEmpty
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;
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; @clobbers none
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comOnUart0RunWaitBufferEmpty:
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; TODO: check for timeout etc.
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunWriteBufferEmpty
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;
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; @clobbers R16, R17, X
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comOnUart0RunWriteBufferEmpty:
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ldd r16, Y+UART_HW_IFACE_OFFS_WRITEBUFNUM
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ldi r17, 0xff
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cp r16, r17
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breq comOnUart0RunWriteBufferEmpty_setIdle
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std Y+UART_HW_IFACE_OFFS_WRITEBUFNUM, r17
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rcall NET_Buffer_ReleaseByNum ; (R16, X)
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comOnUart0RunWriteBufferEmpty_setIdle:
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rcall UART_HW_Uart0_StopTx ; disable transceiver and interrupts (R16)
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ldi r16, UART_HW_WRITEMODE_IDLE
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std Y+UART_HW_IFACE_OFFS_WRITEMODE, r16
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ldi r16, NET_IFACE_OFFS_PACKETSOUT_LOW ; increment packets counter
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunReadModes
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;
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; @clobbers all, !Y
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comOnUart0RunReadModes:
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ldd r16, Y+UART_HW_IFACE_OFFS_READMODE ; handle read functions
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cpi r16, UART_HW_READMODE_IDLE
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breq comOnUart0RunReadIdle ; (R16, R17, R24, R25, X)
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cpi r16, UART_HW_READMODE_READING
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breq comOnUart0RunReading ; (none)
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cpi r16, UART_HW_READMODE_SKIPPING
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breq comOnUart0RunSkipping ; (R16)
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cpi r16, UART_HW_READMODE_MSGRECEIVED
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breq comOnUart0RunMsgReceived ; (R16, R17, R18, R24, R25)
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunReadIdle
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;
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; @clobbers R16 (R17, R24, R25, X)
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comOnUart0RunReadIdle:
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ldd r16, Y+UART_HW_IFACE_OFFS_READBUFNUM
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cpi r16, 0xff
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brne comOnUart0RunReadIdle_enterReading
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rcall NET_Buffer_Alloc ; (R16, R17, X)
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brcc comOnUart0RunReadIdle_noBuf
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rcall UART_HW_Interface_SetReadBuffer ; (R17)
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comOnUart0RunReadIdle_enterReading:
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ldi r16, UART_HW_READMODE_READING
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std Y+UART_HW_IFACE_OFFS_READMODE, r16
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rcall UART_HW_Uart0_StartRx ; R16
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ret
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comOnUart0RunReadIdle_noBuf:
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ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunReading
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;
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; @clobbers none
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comOnUart0RunReading:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunSkipping
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;
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; @clobbers R16
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comOnUart0RunSkipping:
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sbis COM_ATTN_INPUT, COM_ATTN_PIN ; ATTN low?
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rjmp comOnUart0RunSkipping_end ; yes, jmp
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; ATTN ishigh, skipped message finished
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ldi r16, UART_HW_READMODE_IDLE
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std Y+UART_HW_IFACE_OFFS_READMODE, r16
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comOnUart0RunSkipping_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunMsgReceived
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;
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; @clobbers R16 (R17, R18, R24, R25)
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comOnUart0RunMsgReceived:
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ldd r16, Y+UART_HW_IFACE_OFFS_READBUFNUM
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cpi r16, 0xff
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breq comOnUart0RunMsgReceived_end
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rcall NET_AddIncomingMsgNum ; (R17, R18, X)
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brcs comOnUart0RunMsgReceived_enterIdle
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comOnUart0RunMsgReceived_overrun: ; reset/reuse current buffer
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rcall NET_Buffer_Locate
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rcall UART_HW_Interface_SetReadBuffer ; (R17)
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ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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comOnUart0RunMsgReceived_enterIdle:
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ldi r16, 0xff
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std Y+UART_HW_IFACE_OFFS_READBUFNUM, r16
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ldi r16, UART_HW_READMODE_IDLE
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std Y+UART_HW_IFACE_OFFS_READMODE, r16
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comOnUart0RunMsgReceived_end:
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ret
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; @end
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136
avr/modules/uart_hw/lowlevel_uart0.asm
Normal file
136
avr/modules/uart_hw/lowlevel_uart0.asm
Normal file
@@ -0,0 +1,136 @@
|
||||
; ***************************************************************************
|
||||
; copyright : (C) 2025 by Martin Preuss
|
||||
; email : martin@libchipcard.de
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * This file is part of the project "AqHome". *
|
||||
; * Please see toplevel file COPYING of that project for license details. *
|
||||
; ***************************************************************************
|
||||
|
||||
|
||||
|
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.cseg
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; ---------------------------------------------------------------------------
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; @routine UART_HW_Uart0_Init @global
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;
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; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_STATE)
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; @clobbers R16, R17, X
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UART_HW_Uart0_Init:
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M_UART_HW_Uart_Init 0
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine UART_HW_Uart0_StartRx @global
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;
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; @clobbers R16
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UART_HW_Uart0_StartRx:
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M_UART_HW_Uart_StartRx 0
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine UART_HW_Uart0_StopRx @global
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;
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; @clobbers R16
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UART_HW_Uart0_StopRx:
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M_UART_HW_Uart_StopRx 0
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine UART_HW_Uart0_StartTx @global
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;
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; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_STATE)
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; @clobbers R16
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UART_HW_Uart0_StartTx:
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M_UART_HW_Uart_StartTx 0
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ret
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||||
; @end
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||||
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||||
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||||
; ---------------------------------------------------------------------------
|
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; @routine UART_HW_Uart0_StopTx @global
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||||
;
|
||||
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_STATE)
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||||
; @clobbers R16
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||||
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||||
UART_HW_Uart0_StopTx:
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||||
M_UART_HW_Uart_StopTx 0
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||||
ret
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||||
; @end
|
||||
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||||
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||||
; ---------------------------------------------------------------------------
|
||||
; @routine UART_HW_Uart0_Flush
|
||||
;
|
||||
; Flush receiption buffer.
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||||
;
|
||||
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
|
||||
; @clobbers R16
|
||||
|
||||
UART_HW_Uart0_Flush:
|
||||
M_UART_HW_Uart_Flush 0
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine UART_HW_Uart0_RxCharIsr @global
|
||||
;
|
||||
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
|
||||
; @clobbers R16 (R17, R18, R24, R25, X)
|
||||
|
||||
UART_HW_Uart0_RxCharIsr:
|
||||
M_UART_HW_Uart_RxCharIsr 0
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine UART_HW_Uart0_TxUdreIsr @global
|
||||
;
|
||||
; Handler for UDRE1 interrupt called when TX data register is empty.
|
||||
;
|
||||
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
|
||||
; @clobbers R16, R17, X
|
||||
|
||||
UART_HW_Uart0_TxUdreIsr:
|
||||
M_UART_HW_Uart_TxUdreIsr 0
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine UART_HW_Uart0_TxCharIsr @global
|
||||
;
|
||||
; Handler for TXC1 interrupt called when a last byte has been completely sent and
|
||||
; the data register is empty.
|
||||
;
|
||||
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
|
||||
; @clobbers R16
|
||||
|
||||
UART_HW_Uart0_TxCharIsr:
|
||||
M_UART_HW_Uart_TxCharIsr 0
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
@@ -122,7 +122,7 @@ UART_HW_Uart1_TxUdreIsr:
|
||||
; @routine UART_HW_Uart1_TxCharIsr @global
|
||||
;
|
||||
; Handler for TXC1 interrupt called when a last byte has been completely sent and
|
||||
; the data register is empty..
|
||||
; the data register is empty.
|
||||
;
|
||||
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
|
||||
; @clobbers R16
|
||||
|
||||
Reference in New Issue
Block a user