From be74442e7ff133a5215a866cc2efb75ad69e37fa Mon Sep 17 00:00:00 2001
From: Martin Preuss <martin@aquamaniac.de>
Date: Sat, 31 May 2025 15:36:52 +0200
Subject: [PATCH] receiving works again.

---
 avr/modules/uart_bitbang2/bytelevel.asm | 46 ++++++++++++++++---------
 avr/modules/uart_bitbang2/msglevel.asm  |  4 +--
 2 files changed, 31 insertions(+), 19 deletions(-)

diff --git a/avr/modules/uart_bitbang2/bytelevel.asm b/avr/modules/uart_bitbang2/bytelevel.asm
index 5fd5bb3..70a9d9a 100644
--- a/avr/modules/uart_bitbang2/bytelevel.asm
+++ b/avr/modules/uart_bitbang2/bytelevel.asm
@@ -134,28 +134,40 @@ uartBitbang_SendByte_loopEnd:
 ;
 ; @return CFLAG set if okay, clear otherwise
 ; @return R16 byte received
-; @clobbers R16, R20, R21, R22 (R17)
+; @clobbers R16, R17, R20, R21, R22
 
 uartBitbang_ReceiveByte:
-  cbi COM_DATA_DDR, COM_DATA_PIN               ; set DATA port as input
-  cbi COM_DATA_OUTPUT, COM_DATA_PIN            ; disable internal pullup for RXD
-  ldi r21, 8                                   ; bits left
-  clr r20                                      ; byte currently receiving
+  cbi COM_DATA_DDR, COM_DATA_PIN                ; set DATA port as input
+  cbi COM_DATA_OUTPUT, COM_DATA_PIN             ; disable internal pullup for RXD
+  ldi r21, 8                                    ; bits left
+  clr r20                                       ; byte currently receiving
+
   ; wait for startbit
-  rcall uartBitbang_WaitForDataLow             ; (R17, R22)
-  brcc uartBitbang_ReceiveByte_error
-  Utils_WaitNanoSecs COM_HALFBIT_LENGTH, 10, r22  ; goto middle of startbit to maximize sync stability
+  ldi r16, 10
+uartBitbang_ReceiveByte_loopStartBit1:
+    ldi r17, 100                                  ; wait for 100us
+uartBitbang_ReceiveByte_loopStartBit2:
+      sbis COM_DATA_INPUT, COM_DATA_PIN
+        rjmp uartBitbang_ReceiveByte_gotStartBit
+      Utils_WaitNanoSecs 1000, 0, r22             ; wait for 1us
+      dec r17
+    brne uartBitbang_ReceiveByte_loopStartBit2
+    dec r16
+  brne uartBitbang_ReceiveByte_loopStartBit1
+  rjmp uartBitbang_ReceiveByte_error
+uartBitbang_ReceiveByte_gotStartBit:
+  Utils_WaitNanoSecs COM_HALFBIT_LENGTH, 0, r22 ; goto middle of startbit to maximize sync stability (4)
 uartBitbang_ReceiveByte_loop:
-    Utils_WaitNanoSecs COM_BIT_LENGTH, 8, r22  ; 8 cycles used in the complete loop between waits
-    sec                                        ; +1
-    sbic COM_DATA_INPUT, COM_DATA_PIN          ; LOW: +2, HIGH: +1
-      rjmp uartBitbang_ReceiveByte_shiftIn     ; HIGH: +2, rjmp, use set CFLAG
-    clc                                        ; LOW: +1
+    Utils_WaitNanoSecs COM_BIT_LENGTH, 8, r22   ; 8 cycles used in the complete loop between waits
+    sec                                         ; +1
+    sbic COM_DATA_INPUT, COM_DATA_PIN           ; LOW: +2, HIGH: +1
+      rjmp uartBitbang_ReceiveByte_shiftIn      ; HIGH: +2, rjmp, use set CFLAG
+    clc                                         ; LOW: +1
 uartBitbang_ReceiveByte_shiftIn:
-    ror r20                                    ; +1
-    dec r21                                    ; +1
-  brne uartBitbang_ReceiveByte_loop                                  ; +2, sum per loop: 8 cycles
-  rcall uartBitbang_WaitForDataHigh            ; wait for start of stopbit
+    ror r20                                     ; +1
+    dec r21                                     ; +1
+  brne uartBitbang_ReceiveByte_loop             ; +2, sum per loop: 8 cycles
+  rcall uartBitbang_WaitForDataHigh             ; wait for start of stopbit
   brcc uartBitbang_ReceiveByte_error
   mov r16, r20
   sec
diff --git a/avr/modules/uart_bitbang2/msglevel.asm b/avr/modules/uart_bitbang2/msglevel.asm
index 0689964..3a9d21b 100644
--- a/avr/modules/uart_bitbang2/msglevel.asm
+++ b/avr/modules/uart_bitbang2/msglevel.asm
@@ -78,7 +78,7 @@ uartBitbang_RawReceiveMsg:
   breq uartBitbang_RawReceiveMsg_forMe
   cpi r16, 0xff
   breq uartBitbang_RawReceiveMsg_forMe
-  clr r16
+  clr r16                                   ; not for me
   rjmp uartBitbang_RawReceiveMsg_clcRet
 uartBitbang_RawReceiveMsg_forMe:
   subi r19, 1
@@ -87,10 +87,10 @@ uartBitbang_RawReceiveMsg_forMe:
   ; read size of msg payload (e.g. number of msg bytes following minus CRC byte)
   rcall uartBitbang_ReceiveByte             ; read byte (R16, R17, R20, R21, R22)
   brcc uartBitbang_RawReceiveMsg_eIo
-  inc r16                                   ; account for crc byte
   subi r19, 1
   brcs uartBitbang_RawReceiveMsg_eBadSize
   st X+, r16                                ; store msg payload size
+  inc r16                                   ; account for crc byte
   sub r19, r16                              ; check msg size against remaining buffer size
   brcs uartBitbang_RawReceiveMsg_eBadSize
   mov r19, r16