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start using new COM module in n27, r05 and t03.

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This commit is contained in:
Martin Preuss
2025-07-19 09:47:23 +02:00
parent 4a5ba97b85
commit b7234a6da2
6 changed files with 78 additions and 21 deletions
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29
avr/devices/r05/defs.asm
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@@ -56,11 +56,11 @@
.equ COM_HALFBIT_LENGTH = 26000 ; see https://de.wikipedia.org/wiki/Universal_Asynchronous_Receiver_Transmitter
; settings for comOnUart0
;.equ COM_DATA_DDR = DDRA
;.equ COM_DATA_INPUT = PINA
;.equ COM_DATA_OUTPUT = PORTA
;.equ COM_DATA_PUE = PUEA
;.equ COM_DATA_PIN = PORTA2
.equ COM_DATA0_DDR = DDRA
.equ COM_DATA0_INPUT = PINA
.equ COM_DATA0_OUTPUT = PORTA
.equ COM_DATA0_PUE = PUEA
.equ COM_DATA0_PIN = PORTA2
.equ COM_ATTN0_DDR = DDRA
.equ COM_ATTN0_INPUT = PINA
@@ -87,6 +87,25 @@
.equ COM_IRQ_GIMSK_ATTN1 = PCIE1
; settings for comOnUart1
.equ COM_DATA1_DDR = DDRA
.equ COM_DATA1_INPUT = PINA
.equ COM_DATA1_OUTPUT = PORTA
.equ COM_DATA1_PUE = PUEA
.equ COM_DATA1_PIN = PORTA4
.equ COM_CLK1_DDR = DDRB
.equ COM_CLK1_INPUT = PINB
.equ COM_CLK1_OUTPUT = PORTB
.equ COM_CLK1_PUE = PUEB
.equ COM_CLK1_PIN = PORTB1
.equ COM_IRQ_ADDR_CLK1 = PCMSK1
.equ COM_IRQ_BIT_CLK1 = PCINT9 ; bit PCINT9 in PCMSK1
.equ COM_IRQ_GIFR_CLK1 = PCIF1
.equ COM_IRQ_GIMSK_CLK1 = PCIE1
; ---------------------------------------------------------------------------
; TWI master module