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start using new COM module in n27, r05 and t03.

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This commit is contained in:
Martin Preuss
2025-07-19 09:47:23 +02:00
parent 4a5ba97b85
commit b7234a6da2
6 changed files with 78 additions and 21 deletions
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29
avr/devices/r05/defs.asm
View File

@@ -56,11 +56,11 @@
.equ COM_HALFBIT_LENGTH = 26000 ; see https://de.wikipedia.org/wiki/Universal_Asynchronous_Receiver_Transmitter
; settings for comOnUart0
;.equ COM_DATA_DDR = DDRA
;.equ COM_DATA_INPUT = PINA
;.equ COM_DATA_OUTPUT = PORTA
;.equ COM_DATA_PUE = PUEA
;.equ COM_DATA_PIN = PORTA2
.equ COM_DATA0_DDR = DDRA
.equ COM_DATA0_INPUT = PINA
.equ COM_DATA0_OUTPUT = PORTA
.equ COM_DATA0_PUE = PUEA
.equ COM_DATA0_PIN = PORTA2
.equ COM_ATTN0_DDR = DDRA
.equ COM_ATTN0_INPUT = PINA
@@ -87,6 +87,25 @@
.equ COM_IRQ_GIMSK_ATTN1 = PCIE1
; settings for comOnUart1
.equ COM_DATA1_DDR = DDRA
.equ COM_DATA1_INPUT = PINA
.equ COM_DATA1_OUTPUT = PORTA
.equ COM_DATA1_PUE = PUEA
.equ COM_DATA1_PIN = PORTA4
.equ COM_CLK1_DDR = DDRB
.equ COM_CLK1_INPUT = PINB
.equ COM_CLK1_OUTPUT = PORTB
.equ COM_CLK1_PUE = PUEB
.equ COM_CLK1_PIN = PORTB1
.equ COM_IRQ_ADDR_CLK1 = PCMSK1
.equ COM_IRQ_BIT_CLK1 = PCINT9 ; bit PCINT9 in PCMSK1
.equ COM_IRQ_GIFR_CLK1 = PCIF1
.equ COM_IRQ_GIMSK_CLK1 = PCIE1
; ---------------------------------------------------------------------------
; TWI master module

11
avr/devices/r05/main/main.asm
View File

@@ -70,12 +70,13 @@
#endif
#define MODULES_NETWORK
#define MODULES_COMONUART0
#define MODULES_COMONUART1
;#define MODULES_COMONUART1
#define MODULES_COM2W1
;#define APPS_NETWORK
#define APPS_ROUTER
.equ NET_BUFFERS_NUM = 11
.equ NET_BUFFERS_NUM = 10
@@ -102,7 +103,7 @@
rjmp BOOTLOADER_ADDR ; 1: RESET Reset vector use this for flashed system
reti ; 2: INT0 External Interrupt Request 0
rjmp ComOnUart0_AttnChangeIsr ; 3: PCINT0 Pin Change Interrupt 0
rjmp ComOnUart1_AttnChangeIsr ; 4: PCINT1 Pin Change Interrupt 1
rjmp COM2W1_ClkChangeIsr ; 4: PCINT1 Pin Change Interrupt 1
reti ; 5: WDT Watchdog Time-out
reti ; 6: TIM1_CAPT Timer/Counter1 Capture Event
reti ; 7: TIM1_COMPA (OC1A) Timer/Counter1 Compare Match A
@@ -125,7 +126,7 @@
reti ; 24: USART0_DRE USART0 Data Register Empty
reti ; 25: USART0_TXC USART0 Tx Complete
reti ; 26: USART1_RXS USART1 Rx Start
rjmp ComOnUart1_RxCharIsr ; 27: USART1_RXC USART1 Rx Complete
reti ; 27: USART1_RXC USART1 Rx Complete
reti ; 28: USART1_DRE USART1 Data Register Empty
reti ; 29: USART1_TXC USART1 Tx Complete
reti ; 30: TWI Two-Wire-Interface
@@ -210,7 +211,7 @@ onMessageReceived:
; defines for network interface
.equ netInterfaceData = comOnUart0_iface
.equ netInterfaceData2 = comOnUart1_iface
.equ netInterfaceData2 = com2w1_iface