From b6800e538d1c560eb2e3665c78bd30002dd87ec0 Mon Sep 17 00:00:00 2001
From: Martin Preuss <martin@aquamaniac.de>
Date: Sun, 18 May 2025 00:58:46 +0200
Subject: [PATCH] tried some fixes...

---
 avr/modules/uart_hw/comonuart0.asm | 72 +++++++++++++++++++++++++++---
 1 file changed, 67 insertions(+), 5 deletions(-)

diff --git a/avr/modules/uart_hw/comonuart0.asm b/avr/modules/uart_hw/comonuart0.asm
index cc1e4ba..5133005 100644
--- a/avr/modules/uart_hw/comonuart0.asm
+++ b/avr/modules/uart_hw/comonuart0.asm
@@ -30,22 +30,32 @@ comOnUart0_iface: .byte UART_HW_IFACE_SIZE
 ComOnUart0_Init:
   ldi yl, LOW(comOnUart0_iface)
   ldi yh, HIGH(comOnUart0_iface)
-  rcall comOnUart0SetAttnInput   ; (none)
+  rcall comOnUart0SetAttnInput            ; (none)
 
   rcall UART_HW_Interface_Init            ; (R16, R17, X)
   rcall comOnUart0Init                    ; (R16, R17, X)
   ldi r16, COMONUART0_IFACENUM
   std Y+NET_IFACE_OFFS_IFACENUM, r16
 
+.if COM_IRQ_BIT_ATTN == INT0
+  M_IO_READ r16, MCUCR
+  cbr r16, (1<<ISC01) | (1<<ISC00)
+  sbr r16, (1<<ISC01) | (0<<ISC00)        ; falling edge of ATTN
+;  sbr r16, (0<<ISC01) | (0<<ISC00)         ; low level triggers
+
   M_IO_READ r16, COM_IRQ_ADDR_ATTN        ; enable irq for ATTN line
-  sbr r16, COM_IRQ_BIT_ATTN
+  sbr r16, (1<<COM_IRQ_BIT_ATTN)
   M_IO_WRITE COM_IRQ_ADDR_ATTN, r16
 
+.endif
+
+
 .ifdef COM_IRQ_GIMSK_ATTN
   M_IO_READ r16, GIMSK                    ; enable pin change irq PCIE0 or PCIE1
   sbr r16, (1<<COM_IRQ_GIMSK_ATTN)
   M_IO_WRITE GIMSK, R16
 .endif
+
   ldi r16, (1<<COM_IRQ_GIFR_ATTN)         ; clear pending irq by writing 1 to ATTN bit
   out GIFR, r16
 
@@ -208,6 +218,8 @@ ComOnUart0_AttnChangeIsr:
 ; @clobbers R16 (R17, R24, R25, X)
 
 comOnUart0ActOnAttn:
+;  cbi LED_SIMPLE_PORT, LED_SIMPLE_PINNUM   ; on DEBUG
+  
   ldd r16, Y+UART_HW_IFACE_OFFS_WRITEMODE  ; test for active write mode
   cpi r16, UART_HW_WRITEMODE_IDLE
   brne comOnUart0ActOnAttn_end             ; in write mode, don't start read mode
@@ -218,6 +230,7 @@ comOnUart0ActOnAttn:
 
   sbic COM_ATTN_INPUT, COM_ATTN_PIN        ; ATTN high?
     rjmp comOnUart0ActOnAttn_end
+
   rcall comOnUart0StartReading           ; (R16, R17, R24, R25, X)
 
 comOnUart0ActOnAttn_end:
@@ -366,6 +379,7 @@ comOnUart0RunWriteIdle:
   rcall NET_Interface_GetNextOutgoingMsgNum  ; take msg from queue (R17, R18, X)
 comOnUart0RunWriteIdle_end:
   ret
+; @end
 
 
 ; ---------------------------------------------------------------------------
@@ -536,6 +550,10 @@ comOnUart0Init:
 ; @clobbers R16
 
 comOnUart0StartRx:
+  M_IO_READ r16, UCSR0A                              ; clear errors
+  cbr r16, (1<<FE0) | (1<<DOR0) | (1<<UPE0)
+  M_IO_WRITE UCSR0A, r16
+
   M_UART_HW_Uart_StartRx 0
   ret
 ; @end
@@ -583,15 +601,46 @@ comOnUart0StopTx:
 ; @routine comOnUart0RxCharIsr @global
 ;
 ; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
-; @clobbers R16 (R17, R18, R24, R25, X)
+; @clobbers R16, R17 (R18, R24, R25, X)
 
 comOnUart0RxCharIsr:
-  M_UART_HW_Uart_RxCharHalfDuplexIsr 0
+;  M_UART_HW_Uart_RxCharHalfDuplexIsr 0
+  M_IO_READ r16, UCSR0A                              ; check for errors
+;  mov r17, r16
+;  andi r17, (1<<FE0) | (1<<DOR0) | (1<<UPE0)
+;  brne comOnUart0RxCharIsr_hwerr
+  sbrs r16, RXC0
+    rjmp comOnUart0RxCharIsr_end
+  M_IO_READ r16, USART0_DATAREG                      ; r16=received char
+  rcall comOnUart0EnterReceivedChar
+  rjmp comOnUart0RxCharIsr_end
+comOnUart0RxCharIsr_hwerr:
+  M_UART_HW_Uart_StopRx 0                ; (R16)
+  ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
+  ldi r17, UART_HW_READMODE_SKIPPING
+  rcall NET_Interface_IncCounter16              ; (R24, R25)
+  std Y+UART_HW_IFACE_OFFS_READMODE, r17        ; set read mode
+comOnUart0RxCharIsr_end:
   ret
 ; @end
 
 
 
+; ---------------------------------------------------------------------------
+; @routine comOnUart0EnterReceivedChar
+;
+; @param r16 received char
+; @param Y pointer to interface data in SRAM
+; @clobbers R16 (R17, R18, R24, R25, X)
+
+comOnUart0EnterReceivedChar:
+  M_UART_HW_Uart_EnterReceivedChar 0
+  ret
+; @end
+
+
+
+
 ; ---------------------------------------------------------------------------
 ; @routine comOnUart0TxUdreIsr @global
 ;
@@ -634,10 +683,17 @@ comOnUart0TxCharIsr:
 comOnUart0SetAttnInput:
   cbi COM_ATTN_DDR, COM_ATTN_PIN           ; set ATTN as input
 .ifdef COM_ATTN_PUE
-;  cbi COM_ATTN_PUE, COM_ATTN_PIN           ; disable pullup on ATTN
+  cbi COM_ATTN_PUE, COM_ATTN_PIN           ; disable pullup on ATTN
 .else
   cbi COM_ATTN_OUTPUT, COM_ATTN_PIN        ; disable pullup on ATTN
 .endif
+
+.if COM_IRQ_BIT_ATTN == INT0
+  M_IO_READ r16, COM_IRQ_ADDR_ATTN        ; enable irq for ATTN line
+  sbr r16, (1<<COM_IRQ_BIT_ATTN)
+  M_IO_WRITE COM_IRQ_ADDR_ATTN, r16
+.endif
+
   ret
 ; @end
 
@@ -651,6 +707,12 @@ comOnUart0SetAttnInput:
 ; @clobbers none
 
 comOnUart0SetAttnLow:
+.if COM_IRQ_BIT_ATTN == INT0
+  M_IO_READ r16, COM_IRQ_ADDR_ATTN        ; disable irq for ATTN line
+  cbr r16, (1<<COM_IRQ_BIT_ATTN)
+  M_IO_WRITE COM_IRQ_ADDR_ATTN, r16
+.endif
+
   sbi COM_ATTN_DDR, COM_ATTN_PIN            ; set ATTN as output
   cbi COM_ATTN_OUTPUT, COM_ATTN_PIN         ; set ATTN low
   ret