diff --git a/avr/devices/0BUILD b/avr/devices/0BUILD
index 330a10b..c8e68b1 100644
--- a/avr/devices/0BUILD
+++ b/avr/devices/0BUILD
@@ -25,6 +25,7 @@
   <subdirs>
     all
     c01
+    c02
     n16
     n20
     n21
diff --git a/avr/devices/all/hw_m644p.asm b/avr/devices/all/hw_m644p.asm
new file mode 100644
index 0000000..ccb7f71
--- /dev/null
+++ b/avr/devices/all/hw_m644p.asm
@@ -0,0 +1,136 @@
+; ***************************************************************************
+; copyright   : (C) 2025 by Martin Preuss
+; email       : martin@libchipcard.de
+;
+; ***************************************************************************
+; * This file is part of the project "AqHome".                              *
+; * Please see toplevel file COPYING of that project for license details.   *
+; ***************************************************************************
+
+; Hardware routine  for AtMega 644P devices
+
+
+.cseg
+
+
+; ---------------------------------------------------------------------------
+; @routine systemInitHardware
+;
+
+systemInitHardware:
+  ; set all ports as inputs and enable internal pull-up resistors
+  ldi r16, 0xff
+  clr r17
+
+  out DDRA, r17  ; all input
+  out PORTA, r16 ; enable pull-up on all
+
+  out DDRB, r17  ; all input
+  out PORTB, r16 ; enable pull-up on all
+
+  out DDRC, r17  ; all input
+  out PORTC, r16 ; enable pull-up on all
+
+  out DDRD, r17  ; all input
+  out PORTD, r16 ; enable pull-up on all
+
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine systemSetSpeed
+;
+
+systemSetSpeed:
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine systemSleep
+;
+
+systemSleep:
+  ; only modify SE, SM2, SM1 and SM0
+  cli
+
+  inr r16, SMCR
+  cbr r16, (1<<SE) | (0<<SM2) | (0<<SM1) | (0<<SM0)
+  outr SMCR, r16
+
+  sei                        ; make sure interrupts really are enabled
+
+  inr r16, SMCR       ; enable sleep mode
+  sbr r16, (1<<SE)
+  outr SMCR, r16
+
+  sleep                      ; sleep, wait for interrupt
+
+  inr r16, SMCR       ; disable sleep mode
+  cbr r16, (1<<SE)
+  outr SMCR, r16
+
+  ret
+; @end
+
+
+
+
+
+; ---------------------------------------------------------------------------
+; @routine systemSetupTimer0
+;
+
+systemSetupTimer0:            ; setup timer for IRQ every 100ms
+  ldi r16, (1<<WGM01) | (0<<WGM00)  ; Prescaler 1024, CTC mode
+  outr TCCR0A, r16
+
+  ldi r16, (1<<CS02) | (0<<CS01) | (1<<CS00) | (0<<WGM02) ; Prescaler 1024, CTC mode
+  outr TCCR0B, r16
+
+;
+; Settings for clock 1Mhz (default)
+; use timer0 with OCR0A=98-1 (irq every 97.65625 millisecs), baseTimerModuleReloadValue 1
+;
+.if clock == 1000000
+  ; CMP-A interrupt about every 100ms
+  ldi r16, 98-1      ; (1,000,000/1024)/10 = 97.65625
+  outr OCR0A, r16
+
+  ldi r16, 1
+  sts baseTimerModuleReloadValue, r16
+  sts baseTimerModuleTickCounter, r16
+.endif
+
+;
+; Settings for clock 8Mhz
+; use timer0 with OCR0=78 (irq every 9.984 millisecs), baseTimerModuleReloadValue 10
+;
+.if clock == 8000000
+  ; CMP interrupt about every 10ms
+  ldi r16, 78-1
+  outr OCR0A, r16
+
+  ldi r16, 10
+  sts baseTimerModuleReloadValue, r16
+  sts baseTimerModuleTickCounter, r16
+.endif
+
+  ldi r16, (1<<OCF0A)         ; clear pending interrupts
+  outr TIFR0, r16
+  
+  inr r16, TIMSK0
+  sbr r16, (1<<OCIE0A)        ; Timer/Counter0 Output Compare Match A Interrupt Enable
+  outr TIMSK0, r16
+.endif
+
+  sec
+  ret
+; @end
+
+
+
+
diff --git a/avr/devices/c02/.gitignore b/avr/devices/c02/.gitignore
new file mode 100644
index 0000000..8e0618c
--- /dev/null
+++ b/avr/devices/c02/.gitignore
@@ -0,0 +1,2 @@
+*.eep.hex
+*.obj
diff --git a/avr/devices/c02/0BUILD b/avr/devices/c02/0BUILD
new file mode 100644
index 0000000..ba8c739
--- /dev/null
+++ b/avr/devices/c02/0BUILD
@@ -0,0 +1,22 @@
+<?xml?>
+
+<gwbuild>
+
+  <subdirs>
+    boot
+    main
+  </subdirs>
+
+  <data dist="true" install="$(datadir)/aqhome/devices/nodes">
+    aqua_c02.xml
+  </data>
+
+  <extradist>
+    defs.asm
+    README
+  </extradist>
+  
+
+</gwbuild>
+
+
diff --git a/avr/devices/c02/README b/avr/devices/c02/README
new file mode 100644
index 0000000..53dfeb9
--- /dev/null
+++ b/avr/devices/c02/README
@@ -0,0 +1,10 @@
+
+C01
+===
+
+- Role: Controller with Display
+- MCU: AtMega 644P
+- Connection: RJ45
+- Periphery:
+  - Display with SPI
+
diff --git a/avr/devices/c02/aqua_c02.xml b/avr/devices/c02/aqua_c02.xml
new file mode 100644
index 0000000..521b5d0
--- /dev/null
+++ b/avr/devices/c02/aqua_c02.xml
@@ -0,0 +1,24 @@
+
+<device name="aqua_c02" driver="nodes">
+  <manufacturer>AQUA</manufacturer>
+  <devicetype>C</devicetype>
+  <deviceversion>2</deviceversion>
+  
+  <values>
+    <value name="LEDTIMING"    id="0x88" type="actor"  dataType="uint16" />
+
+    <value name="stats_packets_in"       id="0xe0" type="sensor" dataType="uint16" denom="1" />
+    <value name="stats_packets_out"      id="0xe1" type="sensor" dataType="uint16" denom="1" />
+    <value name="stats_content_errors"   id="0xe2" type="sensor" dataType="uint16" denom="1" />
+    <value name="stats_io_errors"        id="0xe3" type="sensor" dataType="uint16" denom="1" />
+    <value name="stats_nobuf_errors"     id="0xe4" type="sensor" dataType="uint16" denom="1" />
+    <value name="stats_collision_errors" id="0xe5" type="sensor" dataType="uint16" denom="1" />
+    <value name="stats_busy_errors"      id="0xe6" type="sensor" dataType="uint16" denom="1" />
+
+    <value name="stats_heap_used"        id="0xe7" type="sensor" dataType="uint16" denom="1" />
+    <value name="stats_heap_free"        id="0xe8" type="sensor" dataType="uint16" denom="1" />
+    <value name="stats_noram_errors"     id="0xe9" type="sensor" dataType="uint16" denom="1" />
+
+  </values>
+
+</device>
diff --git a/avr/devices/c02/boot/0BUILD b/avr/devices/c02/boot/0BUILD
new file mode 100644
index 0000000..aa0156b
--- /dev/null
+++ b/avr/devices/c02/boot/0BUILD
@@ -0,0 +1,32 @@
+<?xml?>
+
+<gwbuild>
+
+  <target type="AvrHexFile" name="c02_boot" >
+
+    <includes type="avrasm" >
+      -I $(builddir)
+      -I $(srcdir)
+      -I $(topsrcdir)/avr
+      -I $(topbuilddir)/avr
+    </includes>
+
+
+    <sources type="avrasm" >
+      boot.asm
+    </sources>
+
+
+  </target>
+
+
+  <subdirs>
+  </subdirs>
+
+  <extradist>
+  </extradist>
+  
+
+</gwbuild>
+
+
diff --git a/avr/devices/c02/boot/boot.asm b/avr/devices/c02/boot/boot.asm
new file mode 100644
index 0000000..5a77152
--- /dev/null
+++ b/avr/devices/c02/boot/boot.asm
@@ -0,0 +1,160 @@
+; ***************************************************************************
+; Source file for base system node on AtMega 644P
+;
+; This is for the maintenance system (i.e. the flash loader).
+;
+; All definitions and changes should go into this file.
+; ***************************************************************************
+
+.equ clock=8000000 ; Define the clock frequency
+
+.nolist
+.include "include/m644Pdef.inc" ; Define device ATmega8515
+.list
+
+.include "../defs.asm"
+.include "devices/all/defs.asm"
+
+.include "common/calls.asm"
+.include "common/utils_wait.asm"
+.include "common/utils_io.asm"
+
+
+
+; ***************************************************************************
+; defines
+
+; ---------------------------------------------------------------------------
+; generic
+
+
+.equ NET_BUFFERS_NUM            = 6
+.equ NET_BUFFERS_SIZE           = 32
+
+
+
+; ---------------------------------------------------------------------------
+; firmware settings
+
+.equ FIRMWARE_VERSION_MAJOR       = 0
+.equ FIRMWARE_VERSION_MINOR       = 0
+.equ FIRMWARE_VERSION_PATCHLEVEL  = 1
+
+
+
+; ---------------------------------------------------------------------------
+; LED
+
+.equ LED_DDR             = DDRD
+.equ LED_PORT            = PORTD
+.equ LED_PIN             = PIND
+.equ LED_PINNUM          = PORTD4
+
+
+
+
+
+; ***************************************************************************
+; code segment
+
+.cseg
+.org 0x0000
+
+
+
+; ---------------------------------------------------------------------------
+; Reset and interrupt vectors
+  jmp main                      ;  1: Reset vector   RESET
+  jmp irqNotSet                 ;  2: INT0           External Interrupt Request 0
+  jmp irqNotSet                 ;  3: INT1           External Interrupt Request 1
+  jmp irqNotSet                 ;  4: INT2           External Interrupt Request 2
+  jmp irqNotSet                 ;  5: PCINT0         Pin Change Interrupt Request 0
+  jmp irqNotSet                 ;  6: PCINT1         Pin Change Interrupt Request 1
+  jmp irqNotSet                 ;  7: PCINT2         Pin Change Interrupt Request 2
+  jmp irqNotSet                 ;  8: PCINT3         Pin Change Interrupt Request 3
+  jmp irqNotSet                 ;  9: WDT            Watchdog Time-out Interrupt
+  jmp irqNotSet                 ; 10: TIMER2_COMPA   Timer/Counter2 Compare Match A
+  jmp irqNotSet                 ; 11: TIMER2_COMPB   Timer/Counter2 Compare Match B
+  jmp irqNotSet                 ; 12: TIMER2_OVF     Timer/Counter2 Overflow
+  jmp irqNotSet                 ; 13: TIMER1_CAPT    Timer/Counter1 Capture Event
+  jmp irqNotSet                 ; 14: TIMER1_COMPA   Timer/Counter1 Compare Match A
+  jmp irqNotSet                 ; 15: TIMER1_COMPB   Timer/Counter1 Compare Match B
+  jmp irqNotSet                 ; 16: TIMER1_OVF     Timer/Counter1 Overflow
+  jmp irqNotSet                 ; 17: TIMER0_COMPA   Timer/Counter0 Compare Match A
+  jmp irqNotSet                 ; 18: TIMER0_COMPB   Timer/Counter0 Compare Match B
+  jmp irqNotSet                 ; 19: TIMER0_OVF     Timer/Counter0 Overflow
+  jmp irqNotSet                 ; 20: SPI_STC        Serial Transfer Complete
+  jmp irqNotSet                 ; 21: USART0_RXC     USART0 Rx Complete
+  jmp irqNotSet                 ; 22: USART0_UDRE    USART0 Data Register Empty
+  jmp irqNotSet                 ; 23: USART0_TXC     USART0 Tx Complete
+  jmp irqNotSet                 ; 24: ANA_COMP       Analog Comparator
+  jmp irqNotSet                 ; 25: ADC            ADC Conversion Complete
+  jmp irqNotSet                 ; 26: EE_RDY         EEPROM Ready
+  jmp irqNotSet                 ; 27: TWI            2-Wire Interface
+  jmp irqNotSet                 ; 28: SPM_RDY        Store Program Memory Ready
+
+
+
+; ---------------------------------------------------------------------------
+; Device Info Block
+
+devInfoBlock:        ; 12 bytes
+devInfoManufacturer: .db 'A', 'Q', 'U', 'A'
+devInfoId:           .db DEVICEINFO_ID, 0
+devInfoVersion:      .db DEVICEINFO_VERSION, DEVICEINFO_REVISION             ; version, revision
+firmwareVersion:     .db FIRMWARE_VARIANT_BOOT, FIRMWARE_VERSION_MAJOR
+                     .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL
+
+firmwareStart:
+  jmp main        ; will be overwritten when flashing
+
+irqNotSet:
+  reti
+
+
+
+; ***************************************************************************
+; main code
+
+
+.org BOOTLOADER_ADDR
+
+
+main:
+;  ldi r16, 0xb0   ; orig: a0
+;  out OSCCAL, r16
+  jmp bootLoader ; this routine is in modules/bootloader/main.asm
+
+
+
+; ***************************************************************************
+; includes
+
+.include "common/wait_10us.asm"
+.include "common/utils_copy_from_flash.asm"
+.include "common/utils_copy_sdram.asm"
+
+.include "modules/flash/defs.asm"
+.include "modules/flash/eeprom.asm"
+.include "modules/flash/io.asm"
+.include "modules/flash/io_attn.asm"
+.include "modules/flash/io_bitbang.asm"
+.include "modules/flash/flash1pmega.asm"
+.include "modules/flash/flashxp.asm"
+.include "modules/flash/flashprocess.asm"
+.include "modules/flash/wait.asm"
+.include "modules/bootloader/main.asm"
+.include "modules/network/msg/defs.asm"
+.include "modules/network/msg/crc.asm"
+
+;.include "common/debug.asm"
+
+
+
+systemSetSpeed:
+  ; speed not changeable at runtime on this device
+  ret
+
+
+
+
diff --git a/avr/devices/c02/defs.asm b/avr/devices/c02/defs.asm
new file mode 100644
index 0000000..0868133
--- /dev/null
+++ b/avr/devices/c02/defs.asm
@@ -0,0 +1,175 @@
+; ***************************************************************************
+; copyright   : (C) 2025 by Martin Preuss
+; email       : martin@libchipcard.de
+;
+; ***************************************************************************
+; * This file is part of the project "AqHome".                              *
+; * Please see toplevel file COPYING of that project for license details.   *
+; ***************************************************************************
+
+
+; ***************************************************************************
+;
+;                                 AtMega644
+;                                 --------
+;                    DSPLED  PB0  1     40 PA0 DEV0
+;                        DC  PB1  2     39 PA1 DEV1
+;                      INT2  PB2  3     38 PA2 DEV2
+;                    DSPRES  PB3  4     37 PA3 PA3
+;                        SS  PB4  5     36 PA4 PA4
+;                      MOSI  PB5  6     35 PA5
+;                      MISO  PB6  7     34 PA6
+;                       SCK  PB7  8     33 PA7
+;                         /RESET  9     32 AREF
+;                            VCC 10     31 GND
+;                            GND 11     30 AVCC
+;                          XTAL2 12     29 PC7
+;                          XTAL1 13     28 PC6
+;                       RXD  PD0 14     27 PC5
+;                       TXD  PD1 15     26 PC4
+;                      ATTN  PD2 16     25 PC3
+;                      INT1  PD3 17     24 PC2
+;                       LED  PD4 18     23 PC1
+;                            PD5 19     22 PC0
+;                            PD6 20     21 PD7
+;                                 --------
+;
+; ***************************************************************************
+
+
+
+.equ BOOTLOADER_ADDR = 0x7c00
+
+.equ FIRMWARE_VARIANT_BOOT        = 0
+.equ FIRMWARE_VARIANT_TEMP_WINDOW = 1
+
+.equ DEVICEINFO_ID       = 'C'
+.equ DEVICEINFO_VERSION  = 2
+.equ DEVICEINFO_REVISION = 0
+
+
+
+; ---------------------------------------------------------------------------
+; LED module
+
+.equ LED_SIMPLE_ONTIME  = 1     ; shorter
+.equ LED_SIMPLE_OFFTIME = 50    ; longer
+.equ LED_SIMPLE_DDR     = DDRD
+.equ LED_SIMPLE_PORT    = PORTD
+.equ LED_SIMPLE_PORTIN  = PIND
+.equ LED_SIMPLE_PINNUM  = PORTD4
+
+
+
+; ---------------------------------------------------------------------------
+; COM module
+
+.equ COM_BIT_LENGTH      = 52000 ; 104000ns=9600, 52000ns=19200, 26000ns=38400
+.equ COM_HALFBIT_LENGTH  = 26000 ; see https://de.wikipedia.org/wiki/Universal_Asynchronous_Receiver_Transmitter
+
+.equ COM_DATA_DDR       = DDRD
+.equ COM_DATA_INPUT     = PIND
+.equ COM_DATA_OUTPUT    = PORTD
+.equ COM_DATA_PIN       = PORTD0
+
+.equ COM_ATTN_DDR       = DDRD
+.equ COM_ATTN_INPUT     = PIND
+.equ COM_ATTN_OUTPUT    = PORTD
+.equ COM_ATTN_PIN       = PORTD2
+
+.equ COM_IRQ_ADDR_ATTN   = EIMSK
+.equ COM_IRQ_BIT_ATTN    = INT0
+.equ COM_IRQ_GIFR_ATTN   = INTF0
+;.equ COM_IRQ_GIMSK_ATTN  = PCIE0
+
+
+
+; ---------------------------------------------------------------------------
+; SPI hardware module
+
+.equ SPIHW_SS_DDR      = DDRB
+.equ SPIHW_SS_INPUT    = PINB
+.equ SPIHW_SS_OUTPUT   = PORTB
+.equ SPIHW_SS_PIN      = PORTB4
+
+.equ SPIHW_MOSI_DDR    = DDRB
+.equ SPIHW_MOSI_INPUT  = PINB
+.equ SPIHW_MOSI_OUTPUT = PORTB
+.equ SPIHW_MOSI_PIN    = PORTB5
+
+.equ SPIHW_MISO_DDR    = DDRB
+.equ SPIHW_MISO_INPUT  = PINB
+.equ SPIHW_MISO_OUTPUT = PORTB
+.equ SPIHW_MISO_PIN    = PORTB6
+
+.equ SPIHW_SCK_DDR    = DDRB
+.equ SPIHW_SCK_INPUT  = PINB
+.equ SPIHW_SCK_OUTPUT = PORTB
+.equ SPIHW_SCK_PIN    = PORTB7
+
+.equ SPIHW_SS0_DDR    = DDRA
+.equ SPIHW_SS0_OUTPUT = PORTA
+.equ SPIHW_SS0_INPUT  = PORTA
+.equ SPIHW_SS0_PIN    = PORTA0
+
+.equ SPIHW_SS1_DDR    = DDRA
+.equ SPIHW_SS1_OUTPUT = PORTA
+.equ SPIHW_SS1_INPUT  = PORTA
+.equ SPIHW_SS1_PIN    = PORTA1
+
+.equ SPIHW_SS2_DDR    = DDRA
+.equ SPIHW_SS2_OUTPUT = PORTA
+.equ SPIHW_SS2_INPUT  = PORTA
+.equ SPIHW_SS2_PIN    = PORTA2
+
+
+
+; ---------------------------------------------------------------------------
+; ILI9341 module
+
+.equ ILI9341_DEVICENUM    = 0
+.equ ILI9341_DSP_WIDTH    = 320
+.equ ILI9341_DSP_HEIGHT   = 240
+
+.equ ILI9341_RESET_DDR    = DDRB
+.equ ILI9341_RESET_OUTPUT = PORTB
+.equ ILI9341_RESET_INPUT  = PORTB
+.equ ILI9341_RESET_PIN    = PORTB3
+
+.equ ILI9341_DC_DDR       = DDRB
+.equ ILI9341_DC_OUTPUT    = PORTB
+.equ ILI9341_DC_INPUT     = PORTB
+.equ ILI9341_DC_PIN       = PORTB1
+
+.equ ILI9341_LED_DDR      = DDRB
+.equ ILI9341_LED_OUTPUT   = PORTB
+.equ ILI9341_LED_INPUT    = PORTB
+.equ ILI9341_LED_PIN      = PORTB0
+
+
+
+; ---------------------------------------------------------------------------
+; ComOnUart module
+
+;.equ USART0_DATAREG = UDR
+;.equ UCSR0A = UCSRA
+;.equ UCSR0B = UCSRB
+;.equ UCSR0C = UCSRC
+;.equ UBRR0L = UBRRL
+;.equ UBRR0H = UBRRH
+
+;.equ UCSZ00 = UCSZ0
+;.equ UCSZ01 = UCSZ1
+;.equ UDRE0  = UDRE
+;.equ RXC0   = RXC
+;.equ TXC0   = TXC
+;.equ FE0    = FE
+;.equ DOR0   = DOR
+;.equ UPE0   = UPE
+;.equ RXEN0  = RXEN
+;.equ TXEN0  = TXEN
+;.equ USBS0  = USBS
+;.equ RXCIE0 = RXCIE
+;.equ UDRIE0 = UDRIE
+
+
diff --git a/avr/devices/c02/main/0BUILD b/avr/devices/c02/main/0BUILD
new file mode 100644
index 0000000..1579434
--- /dev/null
+++ b/avr/devices/c02/main/0BUILD
@@ -0,0 +1,34 @@
+<?xml?>
+
+<gwbuild>
+
+  <target type="AvrHexFile" name="c02_firmware" >
+
+    <includes type="avrasm" >
+      -I $(builddir)
+      -I $(srcdir)
+      -I $(topsrcdir)/avr
+      -I $(topbuilddir)/avr
+    </includes>
+
+
+    <sources type="avrasm" >
+      main.asm
+    </sources>
+
+
+  </target>
+
+
+
+  <subdirs>
+  </subdirs>
+
+  <extradist>
+    data.asm
+  </extradist>
+  
+
+</gwbuild>
+
+
diff --git a/avr/devices/c02/main/data.asm b/avr/devices/c02/main/data.asm
new file mode 100644
index 0000000..31ccc2f
--- /dev/null
+++ b/avr/devices/c02/main/data.asm
@@ -0,0 +1,14 @@
+; ***************************************************************************
+; copyright   : (C) 2025 by Martin Preuss
+; email       : martin@libchipcard.de
+;
+; ***************************************************************************
+; * This file is part of the project "AqHome".                              *
+; * Please see toplevel file COPYING of that project for license details.   *
+; ***************************************************************************
+
+
+
+.dseg
+
+
diff --git a/avr/devices/c02/main/main.asm b/avr/devices/c02/main/main.asm
new file mode 100644
index 0000000..94a7317
--- /dev/null
+++ b/avr/devices/c02/main/main.asm
@@ -0,0 +1,240 @@
+; ***************************************************************************
+; copyright   : (C) 2025 by Martin Preuss
+; email       : martin@libchipcard.de
+;
+; ***************************************************************************
+; * This file is part of the project "AqHome".                              *
+; * Please see toplevel file COPYING of that project for license details.   *
+; ***************************************************************************
+
+;.equ clock=1000000 ; Define the clock frequency
+.equ clock=8000000 ; Define the clock frequency
+
+
+
+.nolist
+.include "include/m644Pdef.inc" ; Define device ATmega644P
+.list
+
+.include "version.asm"
+.include "../defs.asm"
+.include "./data.asm"
+
+.include "devices/all/defs.asm"
+.include "common/calls.asm"
+.include "common/utils_wait.asm"
+.include "common/utils_io.asm"
+
+
+
+; ***************************************************************************
+; defines
+
+; ---------------------------------------------------------------------------
+; generic
+
+.equ NET_BUFFERS_NUM              = 8
+.equ NET_BUFFERS_SIZE             = 32
+
+
+
+; ---------------------------------------------------------------------------
+; heap
+
+.equ HEAP_START = SRAM_START+0x200
+.equ HEAP_SIZE  = SRAM_SIZE-HEAP_START
+
+
+
+
+; ---------------------------------------------------------------------------
+; firmware settings including list of modules used
+
+; #define MODULES_TIMER
+#define MODULES_CLOCK
+;#define MODULES_XRAM
+#define MODULES_HEAP
+#define MODULES_LED_SIMPLE
+#define MODULES_NETWORK
+;#define MODULES_COMONUART0
+;#define MODULES_UART_HW
+#define MODULES_UART_BITBANG
+#define MODULES_SPI_HW
+#define MODULES_ILI9341
+;#define MODULES_FONT_8X8
+#define MODULES_FONT_6X8
+;#define MODULES_UART_BITBANG
+;#define MODULES_TWI_MASTER
+;#define MODULES_LCD
+;#define LCD_MINIMAL_FONT
+;#define MODULES_SI7021
+;#define MODULES_SGP30
+;#define MODULES_SGP40
+;#define MODULES_STATS
+;#define MODULES_OWI_MASTER
+;#define MODULES_DS18B20
+;#define MODULES_MOTION
+;#define MODULES_CCS811
+
+#define APPS_NETWORK
+;#define APPS_MOTION
+;#define APPS_REPORTSENSORS
+#define APPS_STATS
+
+
+
+; ---------------------------------------------------------------------------
+; defines for values
+
+.equ VALUE_ID_SI7021_TEMP      = 0x01
+.equ VALUE_ID_SI7021_HUM       = 0x02
+
+.equ VALUE_ID_ADC              = 0x03
+;.equ VALUE_ID_DS18B20_TEMP     = 0x06
+.equ VALUE_ID_MOTION           = 0x07
+
+.equ VALUE_ID_SGP40_TVOC       = 0x08
+
+.equ VALUE_ID_SGP30_TVOC       = 0x09
+.equ VALUE_ID_SGP30_CO2        = 0x0a
+
+;.equ VALUE_ID_REED_CONF    = 0x81
+
+.equ VALUE_ID_DEBUG            = 0x7f
+
+.equ VALUE_ID_LEDSIMPLE_TIMING = 0x88
+
+
+
+
+
+; ***************************************************************************
+; code segment
+
+.cseg
+.org 000000
+
+
+
+; ---------------------------------------------------------------------------
+; Reset and interrupt vectors
+  jmp BOOTLOADER_ADDR           ;  1: Reset vector   RESET
+  jmp UART_BitBang_PcintIsr     ;  2: INT0           External Interrupt Request 0
+  jmp irqNotSet                 ;  3: INT1           External Interrupt Request 1
+  jmp irqNotSet                 ;  4: INT2           External Interrupt Request 2
+  jmp irqNotSet                 ;  5: PCINT0         Pin Change Interrupt Request 0
+  jmp irqNotSet                 ;  6: PCINT1         Pin Change Interrupt Request 1
+  jmp irqNotSet                 ;  7: PCINT2         Pin Change Interrupt Request 2
+  jmp irqNotSet                 ;  8: PCINT3         Pin Change Interrupt Request 3
+  jmp irqNotSet                 ;  9: WDT            Watchdog Time-out Interrupt
+  jmp irqNotSet                 ; 10: TIMER2_COMPA   Timer/Counter2 Compare Match A
+  jmp irqNotSet                 ; 11: TIMER2_COMPB   Timer/Counter2 Compare Match B
+  jmp irqNotSet                 ; 12: TIMER2_OVF     Timer/Counter2 Overflow
+  jmp irqNotSet                 ; 13: TIMER1_CAPT    Timer/Counter1 Capture Event
+  jmp irqNotSet                 ; 14: TIMER1_COMPA   Timer/Counter1 Compare Match A
+  jmp irqNotSet                 ; 15: TIMER1_COMPB   Timer/Counter1 Compare Match B
+  jmp irqNotSet                 ; 16: TIMER1_OVF     Timer/Counter1 Overflow
+  jmp baseTimerIrqOC0A          ; 17: TIMER0_COMPA   Timer/Counter0 Compare Match A
+  jmp irqNotSet                 ; 18: TIMER0_COMPB   Timer/Counter0 Compare Match B
+  jmp irqNotSet                 ; 19: TIMER0_OVF     Timer/Counter0 Overflow
+  jmp irqNotSet                 ; 20: SPI_STC        Serial Transfer Complete
+  jmp irqNotSet                 ; 21: USART0_RXC     USART0 Rx Complete
+  jmp irqNotSet                 ; 22: USART0_UDRE    USART0 Data Register Empty
+  jmp irqNotSet                 ; 23: USART0_TXC     USART0 Tx Complete
+  jmp irqNotSet                 ; 24: ANA_COMP       Analog Comparator
+  jmp irqNotSet                 ; 25: ADC            ADC Conversion Complete
+  jmp irqNotSet                 ; 26: EE_RDY         EEPROM Ready
+  jmp irqNotSet                 ; 27: TWI            2-Wire Interface
+  jmp irqNotSet                 ; 28: SPM_RDY        Store Program Memory Ready
+
+
+
+devInfoBlock:        ; 12 bytes
+devInfoManufacturer: .db 'A', 'Q', 'U', 'A'
+devInfoId:           .db DEVICEINFO_ID, 0
+devInfoVersion:      .db DEVICEINFO_VERSION, DEVICEINFO_REVISION             ; version, revision
+firmwareVersion:     .db FIRMWARE_VARIANT_TEMP_WINDOW, FIRMWARE_VERSION_MAJOR
+                     .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL
+
+
+
+; ---------------------------------------------------------------------------
+; @routine firmwareStart @global
+
+firmwareStart:
+  rjmp main
+; @end
+
+
+irqNotSet:
+  reti
+
+
+
+; ---------------------------------------------------------------------------
+; @routine onSystemStart
+
+onSystemStart:
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine onMessageReceived
+;
+; Called on every message received
+
+onMessageReceived:
+  clc
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine onEvery100ms
+;
+; Called every 100ms. Add your routine calls here. No arguments, no results.
+
+onEvery100ms:
+onEverySecond:
+onEveryMinute:
+onEveryHour:
+onEveryDay:
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine onEveryLoop
+;
+; Called on every loop (i.e. after awakening from sleep).
+;
+onEveryLoop:
+  ret
+; @end
+
+
+
+
+
+; ***************************************************************************
+; includes
+
+.include "devices/all/hw_m644p.asm"
+.include "devices/all/includes.asm"
+
+.include "common/debug.asm"
+
+
+
+; ---------------------------------------------------------------------------
+; defines for network interface
+
+;.equ netInterfaceData = netUartIface
+.equ netInterfaceData = uart_bitbang_iface
+
+
+
diff --git a/flashnode.sh b/flashnode.sh
index 2e703b5..e4156ac 100755
--- a/flashnode.sh
+++ b/flashnode.sh
@@ -16,6 +16,13 @@ case $NODE in
        LFUSE_ARG="-U lfuse:w:0xE4:m"
        FILE_ARG="-U flash:w:./0-build/avr/devices/c01/boot/c01_boot.hex"
        ;;
+  c02)
+       DEVICE_ARG="-p m644p"
+       HFUSE_ARG="-U hfuse:w:0xD5:m"
+       LFUSE_ARG="-U lfuse:w:0xE2:m"
+       EFUSE_ARG="-U efuse:w:0xFF:m"
+       FILE_ARG="-U flash:w:./0-build/avr/devices/c02/boot/c02_boot.hex"
+       ;;
   n16)
        DEVICE_ARG="-p t84"
        HFUSE_ARG="-U hfuse:w:0xD7:m"