From adcb037976bd0dc2bf5fb5ffcb1e801de2913e1a Mon Sep 17 00:00:00 2001 From: Martin Preuss Date: Sun, 6 Oct 2024 01:30:52 +0200 Subject: [PATCH] avr: fixed 1-wire protocol for multiple speeds. fixed delays won't work with 8MHz when calibrated for 1MHz... use wait macro instead. --- avr/modules/ds18b20/main.asm | 4 +-- avr/modules/owimaster/main.asm | 47 ++++++++++++++++++++++------------ 2 files changed, 33 insertions(+), 18 deletions(-) diff --git a/avr/modules/ds18b20/main.asm b/avr/modules/ds18b20/main.asm index ff53409..b63605d 100644 --- a/avr/modules/ds18b20/main.asm +++ b/avr/modules/ds18b20/main.asm @@ -136,7 +136,7 @@ Ds18b20_OnTimer_done: Ds18b20_SendCommand: mov r18, r16 - rcall OwiMaster_Reset ; (r22) + rcall OwiMaster_Reset ; (r21, r22) tst r16 ; presence detected? breq Ds18b20_SendCommand_error ; nope, jump @@ -166,7 +166,7 @@ Ds18b20_SendCommand_error: ; @clobbers r16, r18, r19, r23, X (r17, r20, r21, r22) Ds18b20_ReadRom: - rcall OwiMaster_Reset ; (r22) + rcall OwiMaster_Reset ; (r21, r22) tst r16 ; presence detected? breq Ds18b20_ReadRom_error ; nope, jump diff --git a/avr/modules/owimaster/main.asm b/avr/modules/owimaster/main.asm index f4fe71b..78e3920 100644 --- a/avr/modules/owimaster/main.asm +++ b/avr/modules/owimaster/main.asm @@ -36,7 +36,7 @@ OwiMaster_Init: ; Cave: Needs interrupts to be disabled! ; ; @return r16 0xff if slave presence signal received, 0x00 otherwise -; @clobbers r22 +; @clobbers r21, r22 OwiMaster_Reset: ; send RESET pulse (min. 480usec) @@ -47,15 +47,30 @@ OwiMaster_Reset: rcall Utils_WaitFor100MicroSecs rcall Utils_WaitFor100MicroSecs rcall Utils_WaitFor100MicroSecs - cbi OWI_DDR, OWI_PINNUM ; set to input - + cbi OWI_DDR, OWI_PINNUM ; set to input + ; after 16-60 uS slave pulls line low for 60-240 uS ; if present slave pulls line low for 60 usecs (we check after 30 usecs) - Utils_WaitNanoSecs 30000, 0, r22 - clr r16 - sbic OWI_PORTIN, OWI_PINNUM - rjmp OwiMaster_Reset_done - dec r16 - rcall owiWaitForDataState1ms ; wait for line pulled up + ldi r21, 100 +OwiMaster_Reset_LoopWaitForLow: ; wait for line low + Utils_WaitNanoSecs 5000, 0, r22 + sbis OWI_PORTIN, OWI_PINNUM + rjmp OwiMaster_Reset_isLow + dec r21 + brne OwiMaster_Reset_LoopWaitForLow + clr r16 ; not present + rjmp OwiMaster_Reset_done +OwiMaster_Reset_isLow: + ldi r21, 160 +OwiMaster_Reset_LoopWaitForHigh: ; wait for line high + Utils_WaitNanoSecs 5000, 0, r22 + sbic OWI_PORTIN, OWI_PINNUM + rjmp OwiMaster_Reset_isHigh + dec r21 + brne OwiMaster_Reset_LoopWaitForHigh + clr r16 ; not present + rjmp OwiMaster_Reset_done +OwiMaster_Reset_isHigh: + ldi r16, 0xff ; presence detected OwiMaster_Reset_done: ret ; @end @@ -75,16 +90,16 @@ OwiMaster_SendByte: cbi OWI_PORTOUT, OWI_PINNUM ; set value to zero ldi r21, 8 OwiMaster_SendByte_loop: - sbi OWI_DDR, OWI_PINNUM ; set to output - lsr r16 ; bit to send -> CARRY - brcs OwiMaster_SendByte_setHigh + sbi OWI_DDR, OWI_PINNUM ; set to output (pull line low) + lsr r16 ; +1 bit to send -> CARRY + brcs OwiMaster_SendByte_setHigh ; +1 / +2 OwiMaster_SendByte_setLow: - Utils_WaitNanoSecs 60000, 0, r22 ; set to low for 60 usecs ("0") - cbi OWI_DDR, OWI_PINNUM ; set to output - Utils_WaitNanoSecs 5000, 0, r22 ; set to low for 5 usecs ("1") + Utils_WaitNanoSecs 60000, 0, r22 ; low for 60 usecs + cbi OWI_DDR, OWI_PINNUM ; set to input (pulls line high) + Utils_WaitNanoSecs 5000, 0, r22 ; wait for 5 usecs rjmp OwiMaster_SendByte_loopEnd OwiMaster_SendByte_setHigh: - Utils_WaitNanoSecs 5000, 0, r22 ; set to low for 5 usecs ("1") + Utils_WaitNanoSecs 5000, 0, r22 ; keep low for 5 usecs cbi OWI_DDR, OWI_PINNUM ; set to output Utils_WaitNanoSecs 60000, 0, r22 ; keep high for remainder of write slot OwiMaster_SendByte_loopEnd: