From a6af10a32d7bb741e0dd4f82d87921a1621b51e8 Mon Sep 17 00:00:00 2001 From: Martin Preuss Date: Sun, 20 Oct 2024 18:50:46 +0200 Subject: [PATCH] avr: added routine Util_WaitForPinState1ms --- avr/common/utils_wait_pin.asm | 54 +++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 avr/common/utils_wait_pin.asm diff --git a/avr/common/utils_wait_pin.asm b/avr/common/utils_wait_pin.asm new file mode 100644 index 0000000..e79741c --- /dev/null +++ b/avr/common/utils_wait_pin.asm @@ -0,0 +1,54 @@ +; *************************************************************************** +; copyright : (C) 2023 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + +; *************************************************************************** +; code + + +.cseg + + + +; --------------------------------------------------------------------------- +; Util_WaitForPinState1ms +; +; Waits up to 1ms for status change on a pin +; +; @param R16 state to wait for (00 for low, 0xff for high) +; @param R17 io address of the port containing the pin +; @param R18 pin mask +; @return CFLAG set if state reached, cleared otherwise +; REGS: R19, R22 + +Util_WaitForPinState1ms: + push xl + push xh + clr xh + mov xl, r17 + ldi r19, 200 +com2WaitForDataState1ms_loop: + ld r22, X + eor r22, r16 + andi r22, r18 + breq com2WaitForDataState1ms_stateReached + Utils_WaitNanoSecs 5000, 0, r22 ; wait for 5us + dec r19 + brne com2WaitForDataState1ms_loop + clc + rjmp com2WaitForDataState1ms_ret +com2WaitForDataState1ms_stateReached: + sec +com2WaitForDataState1ms_ret: + pop xh + pop xl + ret + + +