From 92063410329e8480609d188ecff05dce3dec2b37 Mon Sep 17 00:00:00 2001
From: Martin Preuss <martin@aquamaniac.de>
Date: Mon, 30 Jun 2025 21:29:05 +0200
Subject: [PATCH] started working on improved UART_HW module.

---
 avr/devices/all/includes.asm        |   8 +-
 avr/modules/uart_hw2/0BUILD         |  12 +
 avr/modules/uart_hw2/comonuart1.asm | 816 ++++++++++++++++++++++++++++
 avr/modules/uart_hw2/defs.asm       |  43 ++
 4 files changed, 873 insertions(+), 6 deletions(-)
 create mode 100644 avr/modules/uart_hw2/0BUILD
 create mode 100644 avr/modules/uart_hw2/comonuart1.asm
 create mode 100644 avr/modules/uart_hw2/defs.asm

diff --git a/avr/devices/all/includes.asm b/avr/devices/all/includes.asm
index d28721b..37d6646 100644
--- a/avr/devices/all/includes.asm
+++ b/avr/devices/all/includes.asm
@@ -75,12 +75,8 @@
 #endif
 
 #ifdef MODULES_COMONUART1
-#ifndef MODULES_COMONUART0
-.include "modules/uart_hw/defs.asm"
-.include "modules/uart_hw/lowlevel.asm"
-.include "modules/uart_hw/m_lowlevel_uart.asm"
-#endif
-.include "modules/uart_hw/comonuart1.asm"
+.include "modules/uart_hw2/defs.asm"
+.include "modules/uart_hw2/comonuart1.asm"
 #endif
 
 
diff --git a/avr/modules/uart_hw2/0BUILD b/avr/modules/uart_hw2/0BUILD
new file mode 100644
index 0000000..aecc13e
--- /dev/null
+++ b/avr/modules/uart_hw2/0BUILD
@@ -0,0 +1,12 @@
+<?xml?>
+
+<gwbuild>
+
+  <extradist>
+    comonuart1.asm
+    defs.asm
+  </extradist>
+
+</gwbuild>
+
+
diff --git a/avr/modules/uart_hw2/comonuart1.asm b/avr/modules/uart_hw2/comonuart1.asm
new file mode 100644
index 0000000..3df179b
--- /dev/null
+++ b/avr/modules/uart_hw2/comonuart1.asm
@@ -0,0 +1,816 @@
+; ***************************************************************************
+; copyright   : (C) 2025 by Martin Preuss
+; email       : martin@libchipcard.de
+;
+; ***************************************************************************
+; * This file is part of the project "AqHome".                              *
+; * Please see toplevel file COPYING of that project for license details.   *
+; ***************************************************************************
+
+#ifndef AVR_MODULES_UART_HW2_COMONUART1_H
+#define AVR_MODULES_UART_HW2_COMONUART1_H
+
+
+.dseg
+
+comOnUart1_iface: .byte UART_HW2_IFACE_SIZE
+
+
+
+.cseg
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ComOnUart1_Init @global
+;
+; @clobbers R16, R17, Y (X)
+
+ComOnUart1_Init:
+  ldi yl, LOW(comOnUart1_iface)
+  ldi yh, HIGH(comOnUart1_iface)
+  rcall NET_Interface_Init                  ; (R16, R17, X)
+  ldi r16, 0xff
+  std Y+UART_HW_IFACE_OFFS_WRITEBUFNUM, r16
+  ldi r16, UART_HW2_MODE_IDLE
+  std Y+UART_HW2_IFACE_OFFS_MODE, r16
+  clr r16
+  std Y+NET_IFACE_OFFS_IFACENUM, r16
+  rcall comOnUart1SetAttnInput
+
+  ; set baudrate
+.if clock == 8000000
+  ldi r16, 25 ; (19.2Kb/s at 8MHz)
+  ldi r17, 0
+.endif
+
+.if clock == 1000000
+  ldi r16, 2  ; (19.2Kb/s at 1MHz)
+  ldi r17, 0  
+.endif
+
+  sts UBRR1H, r17
+  sts UBRR1L, r16
+
+  ; set character format 
+  ldi r16, (1<<USBS1)|(3<<UCSZ10)
+  sts UCSR1C, r16
+  sec
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ComOnUart1_Periodically @global
+;
+; @clobbers R16, Y
+
+ComOnUart1_Periodically:
+  push r15
+    in r15, SREG
+    cli
+    ldi yl, LOW(comOnUart1_iface)
+    ldi yh, HIGH(comOnUart1_iface)
+    rcall NET_Interface_Periodically
+    ldd r16, Y+UART_HW2_IFACE_OFFS_MODECOUNTER
+    inc r16
+    breq ComOnUart1_Periodically_end
+    std Y+UART_HW2_IFACE_OFFS_MODECOUNTER, r16
+ComOnUart1_Periodically_end:
+    out SREG, r15
+  pop r15
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1SetMode
+;
+; @param R16 mode
+; @clobbers R17
+comOnUart1SetMode:
+  push r15
+    in r15, SREG
+    cli
+    ldd r17, Y+UART_HW2_IFACE_OFFS_MODE
+    cp r16, r17
+    breq comOnUart1SetMode_end
+    std Y+UART_HW2_IFACE_OFFS_MODE, r16
+    clr r17
+    std Y+UART_HW2_IFACE_OFFS_MODECOUNTER, r17
+comOnUart1SetMode_end:
+    out SREG, r15
+  pop r15
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1StartReading
+;
+; @param Y pointer to interface data in SRAM
+; @clobbers R16, R17, X
+
+comOnUart1StartReading:
+  mov xl, yl
+  mov xh, yh
+  adiw xh:xl, UART_HW2_IFACE_OFFS_BUFFER
+  std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, xl
+  std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
+  ldi r16, UART_HW2_BUFFER_SIZE
+  std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r16
+  clr r16
+  std Y+UART_HW2_IFACE_OFFS_BUFUSED, r16
+  ldi r16, UART_HW2_MODE_READING
+  rcall comOnUart1SetMode                     ; (R17)
+  rcall comOnUart1StartRx                     ; should be the last call here
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1StartWriting
+;
+; @param Y pointer to interface data in SRAM
+; @param R16 buffer number
+; @return CFLAG set if writing started, cleared otherwise
+; @clobbers R16, R17, X, Z (R24, R25)
+
+comOnUart1StartWriting:
+  rcall comOnUart1IsAttnLow                  ; (none)
+  brcs comOnUart1StartWriting_ebusy
+  ; set ATTN low
+  rcall comOnUart1SetAttnLow                 ; (none)
+  Utils_WaitNanoSecs COM_BIT_LENGTH, 0, r22  ; wait for one bit duration
+  Utils_WaitNanoSecs COM_BIT_LENGTH, 0, r22  ; wait for one bit duration
+  ; copy buffer
+  rcall NET_Buffer_Locate                    ; (R17)
+  std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
+  adiw xh:xl, NETMSG_OFFS_MSGLEN+1
+  ld r17, X
+  sbiw xh:xl, NETMSG_OFFS_MSGLEN+1
+  subi r17, -3                               ; add dest addr, msglen, crc
+  ; TODO: check size!
+  std Y+UART_HW2_IFACE_OFFS_BUFUSED, r17
+  std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
+  ; copy into IFACE buffer
+  mov zl, yl
+  mov zh, yh
+  adiw zh:zl, UART_HW2_IFACE_OFFS_BUFFER     ; dest
+  std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, zl
+  std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, zh
+  adiw xh:xl, 1                              ; src (skip buffer header)
+comOnUart1StartWriting_loop:
+    ld r16, X+
+    st Z+, r16
+    dec r17
+  brne comOnUart1StartWriting_loop
+  ldi r16, UART_HW2_MODE_WRITING
+  rcall comOnUart1SetMode                    ; (R17)
+  rcall comOnUart1StartTx                    ; should be the last call here (R16)
+  sec
+  rjmp comOnUart1StartWriting_end
+comOnUart1StartWriting_ebusy:
+  ldi r16, NET_IFACE_OFFS_ERR_BUSY_LOW
+  rcall NET_Interface_IncCounter16           ; (R24, R25)
+  clc
+comOnUart1StartWriting_end:
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ComOnUart1_Run @global
+;
+; @clobbers all
+
+ComOnUart1_Run:
+  ldi yl, LOW(comOnUart1_iface)
+  ldi yh, HIGH(comOnUart1_iface)
+  push r15
+    in r15, SREG
+    cli
+    ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
+    out SREG, r15
+  pop r15
+ComOnUart1_Run_loop:
+    push r16                   ; current state
+      rcall comOnUart1RunMode  ; (all but Y)
+    pop r17                    ; previous state (pop from r16 into r17)
+    ; read new state
+    push r15
+      in r15, SREG
+      cli
+      ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
+      out SREG, r15
+    pop r15
+    cp r16, r17
+  brne ComOnUart1_Run_loop  ; state changed, run again
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1RunMode
+;
+; @clobbers all
+
+comOnUart1RunMode:
+  cpi r16, UART_HW2_MODE_NUM
+  brcs ComOnUart1_Run_jump
+  ldi r16, UART_HW2_MODE_IDLE              ; unknown mode, set to idle
+  rcall comOnUart1SetMode                  ; (R17)
+  ret
+ComOnUart1_Run_jump:
+  ldi zl, LOW(comOnUart1ModeJumpTable)
+  ldi zh, HIGH(comOnUart1ModeJumpTable)
+  add zl, r16
+  adc zh, r16
+  sub zh, r16
+  ijmp
+comOnUart1ModeJumpTable:
+  rjmp comOnUart1RunIdle
+  rjmp comOnUart1RunReading
+  rjmp comOnUart1RunSkipping
+  rjmp comOnUart1RunMsgReceived
+  rjmp comOnUart1RunWriting
+  rjmp comOnUart1RunWaitBufferEmpty
+  rjmp comOnUart1RunMsgSent
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1RunIdle
+;
+; @param Y pointer to interface data in SRAM
+; @clobbers R16, R17, R24, R25, X, Z
+
+comOnUart1RunIdle:
+  ; look for outbound message
+  rcall NET_Interface_PeekNextOutgoingMsgNum ; r16=msgNum
+  brcc comOnUart1RunIdle_end                 ; no outmsg in queue
+  rcall comOnUart1StartWriting               ; (R16, R17, R24, R25, X, Z)
+  brcc comOnUart1RunIdle_end
+  rcall NET_Interface_GetNextOutgoingMsgNum  ; take current msg off the queue
+comOnUart1RunIdle_end:
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1RunReading
+;
+; @param Y pointer to interface data in SRAM
+; @clobbers none
+
+comOnUart1RunReading:
+  ; TODO: check for timeout
+  ret
+; @end
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1RunSkipping
+;
+; @param Y pointer to interface data in SRAM
+; @clobbers R16 (R17)
+
+comOnUart1RunSkipping:
+  rcall comOnUart1IsAttnLow            ; (none)
+  brcs comOnUart1RunSkipping_end       ; still low
+  ldi r16, UART_HW2_MODE_IDLE          ; is high now, leave skipping mode
+  rcall comOnUart1SetMode              ; (R17)
+comOnUart1RunSkipping_end:
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1RunMsgReceived
+;
+; @param Y pointer to interface data in SRAM
+; @clobbers R16, R17, R18, X (R19, R20, R24, R25)
+
+comOnUart1RunMsgReceived:
+  push zl
+    push zh
+      mov xl, yl
+      mov xh, yh
+      adiw xh:xl, UART_HW2_IFACE_OFFS_BUFFER
+      mov zl, xl                                    ; Z=buffer in IFACE
+      mov zh, xh
+      rcall NETMSG_CheckMessageInBuffer             ; (R16, R17, R18, R19, R20, X)
+      brne comOnUart1RunMsgReceived_econtent
+      ; msg valid, alloc buffer
+      rcall NET_Buffer_Alloc                        ; X=buffer, R16=bufnum (R16, R17, X)
+      brcc comOnUart1RunMsgReceived_enobuf
+      mov r18, r16                                  ; buffer num
+      rcall NET_Interface_SetIfaceNumInBuffer       ; (R16, R17)
+      adiw xh:xl, 1
+      ldd r17, Y+UART_HW2_IFACE_OFFS_BUFUSED        ; always is at least 2 here
+comOnUart1RunMsgReceived_copyLoop:
+        ld r16, Z+
+        st X+, r16
+        dec r17
+      brne comOnUart1RunMsgReceived_copyLoop
+      mov r16, r18                                  ; buffer num
+      rcall NET_AddIncomingMsgNum                   ; (R17, R18, X)
+      brcc comOnUart1RunMsgReceived_enoadd
+      ldi r16, NET_IFACE_OFFS_PACKETSIN_LOW
+      rcall NET_Interface_IncCounter16              ; (R24, R25)
+      rjmp comOnUart1RunMsgReceived_setIdleAndEnd
+comOnUart1RunMsgReceived_enoadd:
+      rcall NET_Buffer_ReleaseByNum
+      rjmp comOnUart1RunMsgReceived_enobuf
+comOnUart1RunMsgReceived_enobuf:
+      ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
+      rjmp comOnUart1RunMsgReceived_err
+comOnUart1RunMsgReceived_econtent:
+      ldi r16, NET_IFACE_OFFS_ERR_CONTENT_LOW
+comOnUart1RunMsgReceived_err:
+      rcall NET_Interface_IncCounter16              ; (R24, R25)
+comOnUart1RunMsgReceived_setIdleAndEnd:
+      ldi r16, UART_HW2_MODE_IDLE
+      rcall comOnUart1SetMode                       ; (R17)
+comOnUart1RunMsgReceived_end:
+    pop zl
+  pop zh
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1RunWriting
+;
+; @param Y pointer to interface data in SRAM
+; @clobbers none
+
+comOnUart1RunWriting:
+  ; TODO: check for timeout
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1RunWaitBufferEmpty
+;
+; @clobbers none
+
+comOnUart1RunWaitBufferEmpty:
+  ; TODO: check for timeout etc.
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1RunWriting
+;
+; @param Y pointer to interface data in SRAM
+; @clobbers R16 (R17, R22, R24, R25, X)
+
+comOnUart1RunMsgSent:
+  ldd r16, Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM
+  rcall NET_Buffer_ReleaseByNum                 ; (R16, X)
+  ldi r16, 0xff
+  std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
+  ldi r16, NET_IFACE_OFFS_PACKETSOUT_LOW
+  rcall NET_Interface_IncCounter16              ; (R24, R25)
+  ldi r16, UART_HW2_MODE_IDLE
+  rcall comOnUart1SetMode                       ; (R17)
+  rcall comOnUart1SetAttnInput                  ; release ATTN (none)
+  rcall Utils_WaitFor10MicroSecs                ; make sure ATTN is at least for a short period high (R22)
+  ret
+; @end
+
+
+
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1StartRx
+;
+; @clobbers R16
+
+comOnUart1StartRx:
+  inr r16, UCSR1B
+  sbr r16, (1<<RXCIE1) | (1<<RXEN1)  ; enable RX complete interrupt, enable receive
+  outr UCSR1B, r16
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1StopRx
+;
+; @clobbers R16
+
+comOnUart1StopRx:
+  inr r16, UCSR1B
+  cbr r16, (1<<RXCIE1 | (1<<RXEN1))   ; disable RX complete interrupt, disable receive
+  outr UCSR1B, r16
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1StartTx
+;
+; @clobbers R16
+
+comOnUart1StartTx:
+  lds r16, UCSR1A
+  cbr r16, (1<<TXC1)                             ; clear TXCn interrupt
+  sts UCSR1A, r16
+  lds r16, UCSR1B
+  sbr r16, (1<<UDRIE1) | (1<<TXC1) | (1<<TXEN1)  ; enable TX UDRE and TXC1 interrupt, enable transceive
+  sts UCSR1B, r16
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1StopTx
+;
+; @clobbers R16
+
+comOnUart1StopTx:
+  inr r16, UCSR1B
+  cbr r16, (1<<UDRIE1) | (1<<TXC1) | (1<<TXEN1)  ; disable TX UDRE and TXC1 interrupt, enable transceive
+  outr UCSR1B, r16
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1SetAttnInput
+;
+; Set ATTN line as input (making it effectively HIGH due to pull-up resistor on
+; the line)
+;
+; @clobbers none
+
+comOnUart1SetAttnInput:
+  cbi COM_ATTN1_DDR, COM_ATTN1_PIN           ; set ATTN as input
+.ifdef COM_ATTN1_PUE
+;  cbi COM_ATTN1_PUE, COM_ATTN_PIN           ; disable pullup on ATTN
+.else
+  cbi COM_ATTN1_OUTPUT, COM_ATTN1_PIN        ; disable pullup on ATTN
+.endif
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1SetAttnLow
+;
+; Set ATTN line low.
+;
+; @clobbers none
+
+comOnUart1SetAttnLow:
+  sbi COM_ATTN1_DDR, COM_ATTN1_PIN            ; set ATTN as output
+  cbi COM_ATTN1_OUTPUT, COM_ATTN1_PIN         ; set ATTN low
+  ret
+; @end
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1IsAttnLow
+;
+; Check whether ATTN is low
+;
+; @return CFLAG set if ATTN1 is low
+; @clobbers none
+
+comOnUart1IsAttnLow:
+  clc
+  sbis COM_ATTN1_INPUT, COM_ATTN1_PIN        ; ATTN high?
+    sec                                      ; no
+  ret
+; @end
+
+
+; ---------------------------------------------------------------------------
+; @routine ComOnUart1_RxCharIsr @global @isr
+;
+; @clobbers none
+
+ComOnUart1_RxCharIsr:
+  push r15
+    in r15, SREG
+    push r16
+      push r17
+        push r18
+          push r24
+            push r25
+              push xl
+                push xh
+                  push yl
+                    push yh
+                      ldi yl, LOW(comOnUart1_iface)
+                      ldi yh, HIGH(comOnUart1_iface)
+                      rcall comOnUart1RxCharIsr ; (R16, R17, R18, R24, R25, X)
+                    pop yh
+                  pop yl
+                pop xh
+              pop xl
+            pop r25
+          pop r24
+        pop r18
+      pop r17
+    pop r16
+    out SREG, r15
+  pop r15
+  reti
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ComOnUart1_TxUdreIsr @global @isr
+;
+; @clobbers none
+
+ComOnUart1_TxUdreIsr:
+  push r15
+    in r15, SREG
+    push r16
+      push r17
+        push xl
+          push xh
+            push yl
+              push yh
+                ldi yl, LOW(comOnUart1_iface)
+                ldi yh, HIGH(comOnUart1_iface)
+                rcall comOnUart1TxUdreIsr  ; (R16, R17, X)
+              pop yh
+            pop yl
+          pop xh
+        pop xl
+      pop r17
+    pop r16
+    out SREG, r15
+  pop r15
+  reti
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ComOnUart1_TxCharIsr @global @isr
+;
+; @clobbers none
+
+ComOnUart1_TxCharIsr:
+  push r15
+    in r15, SREG
+    push r16
+      push r17
+        push yl
+          push yh
+            ldi yl, LOW(comOnUart1_iface)
+            ldi yh, HIGH(comOnUart1_iface)
+            rcall comOnUart1TxCharIsr ; (R16, R17)
+          pop yh
+        pop yl
+      pop r17
+    pop r16
+    out SREG, r15
+  pop r15
+  reti
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ComOnUart1AttnChangeIsr @global @isr
+;
+; @clobbers none
+
+
+ComOnUart1AttnChangeIsr:
+  push r15
+    in r15, SREG
+    rcall ComOnUart1_HandleAttnChange
+    out SREG, r15
+  pop r15
+  reti
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ComOnUart1_HandleAttnChange @global
+;
+; @clobbers none
+
+ComOnUart1_HandleAttnChange:
+  push r16
+    push r17
+      push xl
+        push xh
+          push yl
+            push yh
+              ldi yl, LOW(comOnUart1_iface)
+              ldi yh, HIGH(comOnUart1_iface)
+              rcall comOnUart1ActOnAttn      ; (R16, R17, X)
+            pop yh
+          pop yl
+        pop xh
+      pop xl
+    pop r17
+  pop r16
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1ActOnAttn @global
+;
+; @param Y pointer to interface data in SRAM
+; @clobbers R16 (R17, X)
+
+comOnUart1ActOnAttn:
+  ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
+  rcall comOnUart1IsAttnLow              ; (none)
+  brcc comOnUart1ActOnAttn_attnHigh
+  ; ATTN low
+  cpi r16, UART_HW2_MODE_IDLE
+  brne comOnUart1ActOnAttn_end           ; not idle
+  rcall comOnUart1StartReading           ; (R16, R17, X)
+  rjmp comOnUart1ActOnAttn_end
+  ; ATTN high
+comOnUart1ActOnAttn_attnHigh:
+  cpi r16, UART_HW2_MODE_SKIPPING
+  brne comOnUart1ActOnAttn_end
+  ldi r16, UART_HW2_MODE_IDLE
+  rcall comOnUart1SetMode                ; (R17)
+comOnUart1ActOnAttn_end:
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1RxCharIsr @global
+;
+; @param Y pointer to interface data in SRAM
+; @clobbers R16, R17, R18, R24, R25, X
+
+comOnUart1RxCharIsr:
+  ; check for errors
+  inr r16, UCSR1A                              ; check for errors
+  andi r16, (1<<FE1) | (1<<DOR1) | (1<<UPE1)
+  brne comOnUart1RxCharIsr_hwerr
+
+  inr r16, UCSR1A                              ; read status: data available?
+  sbrs r16, RXC1
+    rjmp comOnUart1RxCharIsr_end               ; jmp if no data
+  inr r16, UDR1                                ; r16=received char
+  ; check mode
+  ldd r17, Y+UART_HW2_IFACE_OFFS_MODE
+  cpi r17, UART_HW2_MODE_READING
+  brne comOnUart1RxCharIsr_overrun
+  ; store char
+  ldd xl, Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW
+  ldd xh, Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH
+  st X+, r16
+  std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, xl
+  std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
+  ; handle counters
+  ldd r18, Y+UART_HW2_IFACE_OFFS_BUFUSED
+  inc r18
+  std Y+UART_HW2_IFACE_OFFS_BUFUSED, r18
+  ldd r17, Y+UART_HW2_IFACE_OFFS_BUFLEFT
+  dec r17
+  std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
+  breq comOnUart1RxCharIsr_complete
+  ; check msg size
+  cpi r18, 2
+  brne comOnUart1RxCharIsr_end
+  ; determine msg size
+  sbiw xh:xl, 1                                 ; determine message length (msgLen at previous pos)
+  ld r16, X+                                    ; read payload length byte
+  subi r16, -4                                  ; add 4 (buffer header, dest addr, length, crc byte)
+  cpi r16, UART_HW2_BUFFER_SIZE                 ; total msg length ok?
+  brcc comOnUart1RxCharIsr_emsgsize             ; msg too long
+  subi r16, 2                                   ; subtract bytes already received
+  std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r16        ; set new number of bytes left
+  brne comOnUart1RxCharIsr_end                  ; jmp if still bytes left to receive
+comOnUart1RxCharIsr_complete:
+  rcall comOnUart1StopRx
+  ldi r16, UART_HW2_MODE_MSGRECEIVED
+  rcall comOnUart1SetMode                       ; (R17)
+  rjmp comOnUart1RxCharIsr_end
+comOnUart1RxCharIsr_hwerr:
+  ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
+  rjmp comOnUart1RxCharIsr_err
+comOnUart1RxCharIsr_overrun:
+  ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
+  rjmp comOnUart1RxCharIsr_err
+comOnUart1RxCharIsr_emsgsize:
+  ldi r16, NET_IFACE_OFFS_ERR_MSGSIZE_LOW
+comOnUart1RxCharIsr_err:
+  rcall NET_Interface_IncCounter16              ; (R24, R25)
+  rcall comOnUart1StopRx                        ; (R16)
+  ldi r16, UART_HW2_MODE_SKIPPING               ; skipping mode is left after ATTN becomes high again
+  rcall comOnUart1SetMode                       ; (R17)
+comOnUart1RxCharIsr_end:
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1TxUdreIsr @global
+;
+; Handler for UDRE1 interrupt called when TX data register is empty.
+;
+; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
+; @clobbers R16, R17, X
+
+comOnUart1TxUdreIsr:
+  inr r16, UCSR1A
+  sbrs r16,UDRE1
+    rjmp comOnUart1TxUdreIsr_disable_irq      ; not ready
+  ; check bytes left
+  ldd r17, Y+UART_HW2_IFACE_OFFS_BUFLEFT
+  tst r17
+  breq comOnUart1TxUdreIsr_finished
+  ; read byte
+  ldd xl, Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW
+  ldd xh, Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH
+  ld r16, X+
+  std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, xl
+  std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
+  ; send byte
+  sts UDR1, r16                               ; send byte
+  ; decreased counter
+  dec r17
+  std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
+  brne comOnUart1TxUdreIsr_end                ; still bytes left to send, jump
+comOnUart1TxUdreIsr_finished:
+  ldi r16, UART_HW2_MODE_WAITBUFFEREMPTY
+  rcall comOnUart1SetMode                     ; (R17)
+comOnUart1TxUdreIsr_disable_irq:
+  ; disable further DRE interrupts
+  inr r16, UCSR1B
+  cbr r16, (1<<UDRIE1)                        ; disable TX data register empty interrupt
+  outr UCSR1B, r16
+comOnUart1TxUdreIsr_end:
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine comOnUart1TxCharIsr @global
+;
+; Handler for TXC1 interrupt called when the last byte has been completely sent and
+; the data register is empty.
+;
+; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
+; @clobbers R16, R17
+
+comOnUart1TxCharIsr:
+  ; disable further TXC interrupts
+  inr r16, UCSR1B
+  cbr r16, (1<<TXC1)                          ; disable TXC1 interrupt
+  outr UCSR1B, r16
+  rcall comOnUart1StopTx                      ; (R16)
+  ldi r16, UART_HW2_MODE_MSGSENT
+  rcall comOnUart1SetMode                     ; (R17)
+  ret
+; @end
+
+
+
+
+
+
+
+
+
+
+
+
+#endif ; AVR_MODULES_UART_HW2_COMONUART1_H
diff --git a/avr/modules/uart_hw2/defs.asm b/avr/modules/uart_hw2/defs.asm
new file mode 100644
index 0000000..f3ba474
--- /dev/null
+++ b/avr/modules/uart_hw2/defs.asm
@@ -0,0 +1,43 @@
+; ***************************************************************************
+; copyright   : (C) 2025 by Martin Preuss
+; email       : martin@libchipcard.de
+;
+; ***************************************************************************
+; * This file is part of the project "AqHome".                              *
+; * Please see toplevel file COPYING of that project for license details.   *
+; ***************************************************************************
+
+#ifndef AVR_MODULES_UART_HW2_DEFS_H
+#define AVR_MODULES_UART_HW2_DEFS_H
+
+
+.equ UART_HW2_BUFFER_SIZE = NET_BUFFERS_SIZE
+
+
+.equ UART_HW2_MODE_IDLE            = 0
+.equ UART_HW2_MODE_READING         = 1
+.equ UART_HW2_MODE_SKIPPING        = 2
+.equ UART_HW2_MODE_MSGRECEIVED     = 3
+.equ UART_HW2_MODE_WRITING         = 4
+.equ UART_HW2_MODE_WAITBUFFEREMPTY = 5
+.equ UART_HW2_MODE_MSGSENT         = 6
+.equ UART_HW2_MODE_NUM             = 7
+
+
+
+.equ UART_HW2_IFACE_OFFS_BEGIN        = NET_IFACE_SIZE
+.equ UART_HW2_IFACE_OFFS_MODE         = UART_HW2_IFACE_OFFS_BEGIN
+.equ UART_HW2_IFACE_OFFS_MODECOUNTER  = UART_HW2_IFACE_OFFS_BEGIN+1
+.equ UART_HW2_IFACE_OFFS_WRITEBUFNUM  = UART_HW2_IFACE_OFFS_BEGIN+2
+.equ UART_HW2_IFACE_OFFS_BUFPOS_LOW   = UART_HW2_IFACE_OFFS_BEGIN+3
+.equ UART_HW2_IFACE_OFFS_BUFPOS_HIGH  = UART_HW2_IFACE_OFFS_BEGIN+4
+.equ UART_HW2_IFACE_OFFS_BUFUSED      = UART_HW2_IFACE_OFFS_BEGIN+5
+.equ UART_HW2_IFACE_OFFS_BUFLEFT      = UART_HW2_IFACE_OFFS_BEGIN+6
+.equ UART_HW2_IFACE_OFFS_BUFFER       = UART_HW2_IFACE_OFFS_BEGIN+7
+
+.equ UART_HW2_IFACE_SIZE              = UART_HW2_IFACE_OFFS_BUFFER+UART_HW2_BUFFER_SIZE
+
+
+
+#endif ; AVR_MODULES_UART_HW2_DEFS_H
+