avr: added uart_bitbang module.
Started reorganizing COM module by splitting into higher and lower level functions.
This commit is contained in:
12
avr/modules/uart_bitbang/0BUILD
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12
avr/modules/uart_bitbang/0BUILD
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<?xml?>
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<gwbuild>
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<extradist>
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main.asm
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bytelevel.asm
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</extradist>
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</gwbuild>
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186
avr/modules/uart_bitbang/bytelevel.asm
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186
avr/modules/uart_bitbang/bytelevel.asm
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@@ -0,0 +1,186 @@
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; ***************************************************************************
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; copyright : (C) 2024 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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; ---------------------------------------------------------------------------
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; @macro UART_BB_M_WAIT_FOR_PIN_LOW IN_REG_DATA, IN_PINNUM
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; 0 1
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; Wait for a pin to become low
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; @param %0 DATA register for input pin (e.g. PINB)
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; @param %1 pin number for input (e.g. PORTB1)
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; @return CFLAG set if okay, clear otherwise
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; @clobbers R17, R22
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.macro UART_BB_M_WAIT_FOR_PIN_LOW
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ldi r17, 200
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l_loop:
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sbis @0, @1
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rjmp l_reached
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Utils_WaitNanoSecs 5000, 0, r22 ; wait for 5us
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dec r17
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brne l_loop
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clc
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rjmp l_end
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l_reached:
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sec
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l_end:
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.endmacro
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; @end
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; ---------------------------------------------------------------------------
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; @macro UART_BB_M_WAIT_FOR_PIN_HIGH IN_REG_DATA, IN_PINNUM
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; 0 1
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; Wait for a pin to become high
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; @param %0 DATA register for input pin (e.g. PINB)
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; @param %1 pin number for input (e.g. PORTB1)
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; @return CFLAG set if okay, clear otherwise
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; @clobbers R17, R22
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.macro UART_BB_M_WAIT_FOR_PIN_HIGH
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ldi r17, 200
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l_loop:
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sbic @0, @1
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rjmp l_reached
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Utils_WaitNanoSecs 5000, 0, r22 ; wait for 5us
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dec r17
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brne l_loop
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clc
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rjmp l_end
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l_reached:
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sec
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l_end:
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.endmacro
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; @end
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; ---------------------------------------------------------------------------
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; @routine uartBitbang_SendByte
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;
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; Send a byte.
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; We only set the data pin to low at the beginning for the startbit. After that
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; we only change the pin direction (e.g. input vs output):
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; - for 0 bit: set DDR to output, forcing the data line low
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; - for 1 bit: set DDR to input, letting the external pullup R pull the data line to HIGH
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; since the output pin is still set to 0 the internal pullup is disabled
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; Expects interrupts to be disabled.
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;
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; @param R16 byte to send
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; @return CFLAG set if okay, clear otherwise
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; @clobbers R16, R21, R22
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uartBitbang_SendByte:
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ldi r21, 8 ; +1 bits left
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; send startbit
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cbi COM_TXD_DATA, COM_TXD_PIN ; +2 set DATA low
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sbi COM_TXD_DDR, COM_TXD_PIN ; +2 set DATA as output
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Utils_WaitNanoSecs COM_BIT_LENGTH, 1, r22 ; wait for one bit duration
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; send data bits
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uartBitbang_SendByte_loop: ; 9 for low bit
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lsr r16 ; 1+ bit to send -> CARRY
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brcs uartBitbang_SendByte_setHigh ; HI: +2, LO: +1
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uartBitbang_SendByte_setLow:
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sbi COM_TXD_DDR, COM_TXD_PIN ; +2 set DATA as output
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Utils_WaitNanoSecs COM_BIT_LENGTH, 9, r22
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rjmp uartBitbang_SendByte_loopEnd ; +2
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uartBitbang_SendByte_setHigh:
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cbi COM_TXD_DDR, COM_TXD_PIN ; +2 set DATA as input, pullup R makes it ONE
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nop ; +1 (to make pin change available)
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Utils_WaitNanoSecs COM_HALFBIT_LENGTH, 0, r22 ; wait for half a bit length for line to safely settle
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sbis COM_RXD_DATA, COM_RXD_PIN ; +1 if no skip, +2 if skipped
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rjmp uartBitbang_SendByte_error ; +2 if error (collision: we wanted line to be high but it is low)
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Utils_WaitNanoSecs COM_HALFBIT_LENGTH, 11, r22
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uartBitbang_SendByte_loopEnd:
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dec r21 ; +1
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brne uartBitbang_SendByte_loop ; +2, sum per loop: 10 cycles
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; send stopbit
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cbi COM_TXD_DDR, COM_TXD_PIN ; +2 set DATA as input, pullup R makes it ONE
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Utils_WaitNanoSecs COM_BIT_LENGTH, 0, r22 ; wait for one bit length
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sec
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ret
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uartBitbang_SendByte_error:
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clc
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine uartBitbangReceiveByte
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;
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; Read a byte.
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; Expects interrupts to be disabled.
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;
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; @return CFLAG set if okay, clear otherwise
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; @return R16 byte received
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; @clobbers R16, R20, R21, R22 (R17)
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uartBitbang_ReceiveByte:
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ldi r21, 8 ; bits left
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clr r20 ; byte currently receiving
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; wait for startbit
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rcall uartBitbang_WaitForDataLow ; (R17, R22)
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brcc uartBitbang_ReceiveByte_error
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Utils_WaitNanoSecs COM_HALFBIT_LENGTH, 10, r22 ; goto middle of startbit to maximize sync stability
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uartBitbang_ReceiveByte_loop:
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Utils_WaitNanoSecs COM_BIT_LENGTH, 8, r22 ; 8 cycles used in the complete loop between waits
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sec ; +1
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sbic COM_RXD_DATA, COM_RXD_PIN ; LOW: +2, HIGH: +1
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rjmp uartBitbang_ReceiveByte_shiftIn ; HIGH: +2, rjmp, use set CFLAG
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clc ; LOW: +1
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uartBitbang_ReceiveByte_shiftIn:
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ror r20 ; +1
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dec r21 ; +1
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brne uartBitbang_ReceiveByte_loop ; +2, sum per loop: 8 cycles
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rcall uartBitbang_WaitForDataHigh ; wait for start of stopbit
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brcc uartBitbang_ReceiveByte_error
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mov r16, r20
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sec
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ret
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uartBitbang_ReceiveByte_error:
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clc
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine uartBitbang_WaitForDataLow
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;
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; Wait for data pin to become low
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; @return CFLAG set if okay, clear otherwise
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; @clobbers R17, R22
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uartBitbang_WaitForDataLow:
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UART_BB_M_WAIT_FOR_PIN_LOW COM_RXD_DATA, COM_RXD_PIN
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine uartBitbang_WaitForDataHigh
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;
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; Wait for data pin to become high
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; @return CFLAG set if okay, clear otherwise
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; @clobbers R17, R22
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uartBitbang_WaitForDataHigh:
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UART_BB_M_WAIT_FOR_PIN_LOW COM_RXD_DATA, COM_RXD_PIN
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ret
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; @end
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13
avr/modules/uart_bitbang/defs.asm
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13
avr/modules/uart_bitbang/defs.asm
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@@ -0,0 +1,13 @@
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; ***************************************************************************
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; copyright : (C) 2024 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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.equ UART_BITBANG_BUFFER_NUM = 4
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398
avr/modules/uart_bitbang/main.asm
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398
avr/modules/uart_bitbang/main.asm
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@@ -0,0 +1,398 @@
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; ***************************************************************************
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; copyright : (C) 2024 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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; UART_BitBang_Init
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; UART_BitBang_Fini
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; UART_BitBang_Run
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; UART_BitBang_SendPacket:
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; UART_BitBang_GetNextReceivedPacket:
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; UART_BitBang_ReleaseReceivedPacket:
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.include "modules/com2/buffer.asm"
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.dseg
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uartBitbangDataBegin:
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uartBitbangRecvBuffersUsed: .byte 1
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uartBitbangMaxBuffersUsed: .byte 1
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uartBitbangRecvBuffersWritePos: .byte 1
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uartBitbangRecvBuffersReadPos: .byte 1
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uartBitbangRecvBuffers: .byte COM2_BUFFER_SIZE*UART_BITBANG_BUFFER_NUM
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uartBitbangDataEnd:
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.cseg
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; ---------------------------------------------------------------------------
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; @routine UART_BitBang_Init
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;
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; @return CFLAG set if okay, clear on error
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; @clobbers R16, R17, X, Y
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UART_BitBang_Init:
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; preset SRAM data area
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ldi xh, HIGH(uartBitbangDataBegin)
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ldi xl, LOW(uartBitbangDataBegin)
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clr r16
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ldi r17, (uartBitbangDataEnd-uartBitbangDataBegin)
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rcall Utils_FillSram
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; setup pins and interrupts
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cbi COM_TXD_DATA, COM_TXD_PIN ; disable internal pullup for TXD
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cbi COM_TXD_DDR, COM_TXD_PIN ; set TXD port as input
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cbi COM_RXD_DATA, COM_RXD_PIN ; disable internal pullup for RXD
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cbi COM_RXD_DDR, COM_RXD_PIN ; set RXD port as input
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cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable internal pullup for ATTN
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cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN port as input
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sbi COM_IRQ_ADDR_ATTN, COM_IRQ_BIT_ATTN ; enable pin change irq for ATTN line
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in r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
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ori r16, (1<<COM_IRQ_GIMSK_ATTN)
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out GIMSK, R16
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ldi r16, (1<<COM_IRQ_GIFR_ATTN) ; clear pending irq by writing 1 to ATTN bit
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out GIFR, r16
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sec
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine UART_BitBang_Init
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;
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; @return CFLAG set if okay, clear on error
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; @clobbers R16, R17, X, Y
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UART_BitBang_Fini:
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cbi COM_TXD_DDR, COM_TXD_PIN ; set TXD port as input
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cbi COM_RXD_DDR, COM_RXD_PIN ; set RXD port as input
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cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN port as input
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cbi COM_IRQ_ADDR_ATTN, COM_IRQ_BIT_ATTN ; disable pin change irq for ATTN line
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in r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
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andi r16, ~(1<<COM_IRQ_GIMSK_ATTN)
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out GIMSK, R16
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ldi r16, (1<<COM_IRQ_GIFR_ATTN) ; clear pending irq by writing 1 to ATTN bit
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out GIFR, r16
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine UART_BitBang_Run
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;
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; @clobbers any
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UART_BitBang_Run:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine UART_BitBang_SendPacket
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; Send packet, if line free.
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;
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; @param X buffer to send
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; @return CFLAG: set if okay (packet sent), cleared on error
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; @clobbers r22, x (r18, r19, r22)
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UART_BitBang_SendPacket:
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rcall uartBitbang_SendPacket
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brcs UART_BitBang_SendPacket_okay
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cpi r16, COM2_ERROR_BUSY
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breq UART_BitBang_SendPacket_busyError
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cpi r16, COM2_ERROR_COLLISION
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breq UART_BitBang_SendPacket_collError
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; fall-through
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UART_BitBang_SendPacket_busyError:
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ldi xl, LOW(com2StatsBusyError)
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ldi xh, HIGH(com2StatsBusyError)
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rjmp UART_BitBang_SendPacket_incCounterRetNc
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UART_BitBang_SendPacket_collError:
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ldi xl, LOW(com2StatsCollisions)
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ldi xh, HIGH(com2StatsCollisions)
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UART_BitBang_SendPacket_incCounterRetNc:
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rcall Utils_IncrementCounter16 ; (r18, r19, r22)
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clc
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ret
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UART_BitBang_SendPacket_okay:
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ldi xl, LOW(com2StatsPacketsOut)
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ldi xh, HIGH(com2StatsPacketsOut)
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rcall Utils_IncrementCounter16 ; (r18, r19, r22)
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sec
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine UART_BitBang_GetNextReceivedPacket
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;
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; Get next received packet from receiption buffers.
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; Call @ref UART_BitBang_ReleaseReceivedPacket to release the packet buffer.
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;
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; @return CFLAG set if okay (packet received), cleared on error
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; @return X pointer to packet received
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; @clobbers r16, r17
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UART_BitBang_GetNextReceivedPacket:
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lds r16, uartBitbangRecvBuffersUsed
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tst r16
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breq UART_BitBang_GetNextReceivedPacket_retNc ; no buffers in use
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||||||
|
lds r16, uartBitbangRecvBuffersReadPos
|
||||||
|
rcall uartBitbang_BufferPosToX ; get current read buffer to X (R16, R17)
|
||||||
|
sec
|
||||||
|
ret
|
||||||
|
UART_BitBang_GetNextReceivedPacket_retNc:
|
||||||
|
clc
|
||||||
|
ret
|
||||||
|
; @end
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
; ---------------------------------------------------------------------------
|
||||||
|
; @routine UART_BitBang_ReleaseReceivedPacket
|
||||||
|
;
|
||||||
|
; Release first packet in queue from from receiption buffers (i.e. the one returned
|
||||||
|
; by @ref UART_BitBang_GetNextReceivedPacket)
|
||||||
|
;
|
||||||
|
; @clobbers r16, r17, r21
|
||||||
|
|
||||||
|
UART_BitBang_ReleaseReceivedPacket:
|
||||||
|
rjmp COM2_BufferDeallocFront ; (r16, r17, r21)
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
; ---------------------------------------------------------------------------
|
||||||
|
; @routine uartBitbang_ReceivePacket
|
||||||
|
;
|
||||||
|
; Receive packet.
|
||||||
|
;
|
||||||
|
; @return CFLAG set if okay (packet received), cleared on error
|
||||||
|
; @clobbers r16, r17, x (r18, r19, r20, r21, r22)
|
||||||
|
|
||||||
|
uartBitbang_ReceivePacket:
|
||||||
|
rcall uartBitbang_BufferAlloc ; (r16, r17, r21)
|
||||||
|
brcs uartBitbang_ReceivePacket_bufferAvailable
|
||||||
|
|
||||||
|
ldi xl, LOW(com2StatsNoBufferError) ; buffer in use, don't release
|
||||||
|
ldi xh, HIGH(com2StatsNoBufferError) ; just increment error counter
|
||||||
|
rcall Utils_IncrementCounter16 ; (r18, r19, 22)
|
||||||
|
clc
|
||||||
|
ret
|
||||||
|
uartBitbang_ReceivePacket_bufferAvailable:
|
||||||
|
push xl
|
||||||
|
push xh
|
||||||
|
lds r16, com2Address
|
||||||
|
ldi r17, (COM2_BUFFER_SIZE-3) ; buffer size minus dst addr, payload len, crc byte
|
||||||
|
rcall uartBitbang_ReceivePacketIntoBuffer ; r16, r17, r18, X (r19, r20, r21, r22)
|
||||||
|
pop xh
|
||||||
|
pop xl
|
||||||
|
brcc uartBitbang_ReceivePacket_error
|
||||||
|
|
||||||
|
rcall com2CheckMessageInBuffer ; (R16, R17, R18, R19, R20, X)
|
||||||
|
brcc uartBitbang_ReceivePacket_dataError
|
||||||
|
|
||||||
|
; everything okay
|
||||||
|
ldi xl, LOW(com2StatsPacketsIn)
|
||||||
|
ldi xh, HIGH(com2StatsPacketsIn)
|
||||||
|
rcall Utils_IncrementCounter16 ; (r18, r19, 22)
|
||||||
|
sec
|
||||||
|
ret
|
||||||
|
|
||||||
|
uartBitbang_ReceivePacket_error:
|
||||||
|
cpi r16, COM2_ERROR_NOTFORME
|
||||||
|
breq uartBitbang_ReceivePacket_notForMe
|
||||||
|
cpi r16, COM2_ERROR_DATAERROR
|
||||||
|
breq uartBitbang_ReceivePacket_dataError
|
||||||
|
;cpi r16, COM2_ERROR_IOERROR
|
||||||
|
;breq uartBitbang_ReceivePacket_ioError
|
||||||
|
;rjmp uartBitbang_ReceivePacket_retnc
|
||||||
|
rjmp uartBitbang_ReceivePacket_ioError ; default to IO ERROR
|
||||||
|
uartBitbang_ReceivePacket_ioError:
|
||||||
|
ldi xl, LOW(com2StatsIoError)
|
||||||
|
ldi xh, HIGH(com2StatsIoError)
|
||||||
|
rjmp uartBitbang_ReceivePacket_incCounterDeallocNc
|
||||||
|
uartBitbang_ReceivePacket_dataError:
|
||||||
|
ldi xl, LOW(com2StatsContentError)
|
||||||
|
ldi xh, HIGH(com2StatsContentError)
|
||||||
|
rjmp uartBitbang_ReceivePacket_incCounterDeallocNc
|
||||||
|
uartBitbang_ReceivePacket_notForMe:
|
||||||
|
ldi xl, LOW(com2StatsNotForMe)
|
||||||
|
ldi xh, HIGH(com2StatsNotForMe)
|
||||||
|
rjmp uartBitbang_ReceivePacket_incCounterDeallocNc
|
||||||
|
uartBitbang_ReceivePacket_incCounterDeallocNc:
|
||||||
|
rcall Utils_IncrementCounter16 ; (r18, r19, 22)
|
||||||
|
uartBitbang_ReceivePacket_deallocRetnc:
|
||||||
|
rcall uartBitbang_BufferDeallocBack
|
||||||
|
uartBitbang_ReceivePacket_retnc:
|
||||||
|
clc
|
||||||
|
ret
|
||||||
|
; @end
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||||
|
; Buffer Management
|
||||||
|
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
; ---------------------------------------------------------------------------
|
||||||
|
; @routine uartBitbang_BufferAlloc
|
||||||
|
;
|
||||||
|
; Allocate a transfer buffer.
|
||||||
|
;
|
||||||
|
; @return CFLAG set if okay, clear otherwise
|
||||||
|
; @return X pointer to allocated buffer in SRAM
|
||||||
|
; @clobbers r16, r17, r21
|
||||||
|
|
||||||
|
uartBitbang_BufferAlloc:
|
||||||
|
COM2_M_BufferAlloc UART_BITBANG_BUFFER_NUM, uartBitbangMaxBuffersUsed, uartBitbangRecvBuffersUsed, uartBitbangRecvBuffersWritePos
|
||||||
|
ret
|
||||||
|
; @end
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
; ---------------------------------------------------------------------------
|
||||||
|
; @routine uartBitbang_BufferDeallocBack
|
||||||
|
;
|
||||||
|
; Release a transfer buffer at the end of the list by decreasing the write pos.
|
||||||
|
; This releases the last allocated buffer!
|
||||||
|
;
|
||||||
|
; @return CFLAG set if okay, clear otherwise
|
||||||
|
; @clobbers r16, r17, r21
|
||||||
|
|
||||||
|
uartBitbang_BufferDeallocBack:
|
||||||
|
COM2_M_BufferDeallocBack UART_BITBANG_BUFFER_NUM, uartBitbangRecvBuffersUsed, uartBitbangRecvBuffersWritePos
|
||||||
|
ret
|
||||||
|
; @end
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
; ---------------------------------------------------------------------------
|
||||||
|
; @routine uartBitbang_BufferDeallocFront
|
||||||
|
;
|
||||||
|
; Release a transfer buffer by increasing the read pos.
|
||||||
|
;
|
||||||
|
; @return CFLAG set if okay, clear otherwise
|
||||||
|
; @clobbers r16, r17, r21
|
||||||
|
|
||||||
|
uartBitbang_BufferDeallocFront:
|
||||||
|
COM2_M_BufferDeallocFront UART_BITBANG_BUFFER_NUM, uartBitbangRecvBuffersUsed, uartBitbangRecvBuffersReadPos
|
||||||
|
ret
|
||||||
|
; @end
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
; ---------------------------------------------------------------------------
|
||||||
|
; @routine uartBitbang_BufferPosToX
|
||||||
|
;
|
||||||
|
; Get a pointer to the SRAM position of the given buffer.
|
||||||
|
; CAVE: Code must correspond to COM2_BUFFER_SIZE!!
|
||||||
|
;
|
||||||
|
; @param R16 buffer number (starting with 0)
|
||||||
|
; @return X pointer to buffer in SRAM
|
||||||
|
; @clobbers R16, R17
|
||||||
|
|
||||||
|
uartBitbang_BufferPosToX:
|
||||||
|
COM2_M_BufferPosToX uartBitbangRecvBuffers
|
||||||
|
ret
|
||||||
|
; @end
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||||
|
; ISR
|
||||||
|
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
uartBitbangIsrPcint0:
|
||||||
|
push r15
|
||||||
|
in r15, SREG
|
||||||
|
sbic COM_ATTN_INPUT, COM_ATTN_PIN
|
||||||
|
rjmp uartBitbangIsrPcint0_end
|
||||||
|
; low, read packet
|
||||||
|
push r1
|
||||||
|
push r16
|
||||||
|
push r17
|
||||||
|
push r18
|
||||||
|
push r19
|
||||||
|
push r20
|
||||||
|
push r21
|
||||||
|
push r22
|
||||||
|
push xh
|
||||||
|
push xl
|
||||||
|
push r15
|
||||||
|
rcall uartBitbang_ReceivePacket ; (r16, r17, r18, r19, r20, r21, r22, x)
|
||||||
|
pop r15
|
||||||
|
lds xl, com2Interrupts
|
||||||
|
lds xh, com2Interrupts+1
|
||||||
|
adiw xh:xl, 1
|
||||||
|
sts com2Interrupts, xl
|
||||||
|
sts com2Interrupts+1, xh
|
||||||
|
pop xl
|
||||||
|
pop xh
|
||||||
|
pop r22
|
||||||
|
pop r21
|
||||||
|
pop r20
|
||||||
|
pop r19
|
||||||
|
pop r18
|
||||||
|
pop r17
|
||||||
|
pop r16
|
||||||
|
pop r1
|
||||||
|
uartBitbangIsrPcint0_end:
|
||||||
|
out SREG, r15
|
||||||
|
pop r15
|
||||||
|
reti
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
; set routine functions
|
||||||
|
.equ COMIO_Init = UART_BitBang_Init
|
||||||
|
.equ COMIO_Fini = UART_BitBang_Fini
|
||||||
|
.equ COMIO_Run = UART_BitBang_Run
|
||||||
|
.equ COMIO_SendPacket = UART_BitBang_SendPacket
|
||||||
|
.equ COMIO_GetNextReceivedPacket = UART_BitBang_GetNextReceivedPacket
|
||||||
|
.equ COMIO_ReleaseReceivedPacket = UART_BitBang_ReleaseReceivedPacket
|
||||||
|
|
||||||
|
|
||||||
159
avr/modules/uart_bitbang/packetlevel.asm
Normal file
159
avr/modules/uart_bitbang/packetlevel.asm
Normal file
@@ -0,0 +1,159 @@
|
|||||||
|
; ***************************************************************************
|
||||||
|
; copyright : (C) 2024 by Martin Preuss
|
||||||
|
; email : martin@libchipcard.de
|
||||||
|
;
|
||||||
|
; ***************************************************************************
|
||||||
|
; * This file is part of the project "AqHome". *
|
||||||
|
; * Please see toplevel file COPYING of that project for license details. *
|
||||||
|
; ***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
; ---------------------------------------------------------------------------
|
||||||
|
; @routine uartBitbang_ReceivePacketIntoBuffer
|
||||||
|
;
|
||||||
|
; Receive a packet into buffer pointed to by X.
|
||||||
|
; Expects interrupts to be disabled.
|
||||||
|
;
|
||||||
|
; @param R16 COM address to listen to
|
||||||
|
; @param R17 maximum value for accepted msg data (i.e. buffersize minus 3)
|
||||||
|
; @param X buffer to receive to
|
||||||
|
; @return CFLAG set if okay (packet received), cleared on error
|
||||||
|
; @return R16 error code if CFLAG is cleared (COM2_ERROR_NOTFORME, COM2_ERROR_IOERROR, COM2_ERROR_DATAERROR)
|
||||||
|
; @clobbers: r16, r17, r18, X (r19, r20, r21, r22)
|
||||||
|
|
||||||
|
uartBitbang_ReceivePacketIntoBuffer:
|
||||||
|
mov r18, r17
|
||||||
|
push r16
|
||||||
|
; read destination address
|
||||||
|
rcall uartBitbang_ReceiveByte ; read byte (R16, R17, R20, R21, R22)
|
||||||
|
pop r17 ; pop from R16 to R17
|
||||||
|
brcc uartBitbang_ReceivePacketIntoBuffer_ioError
|
||||||
|
#ifdef COM_ACCEPT_ALL_DEST ; accept every destination address
|
||||||
|
rjmp uartBitbang_ReceivePacketIntoBuffer_acceptAddr
|
||||||
|
#else
|
||||||
|
; compare destination address (accept "FF" and own address)
|
||||||
|
cp r16, r17
|
||||||
|
breq uartBitbang_ReceivePacketIntoBuffer_acceptAddr
|
||||||
|
cpi r16, 0xff
|
||||||
|
breq uartBitbang_ReceivePacketIntoBuffer_acceptAddr
|
||||||
|
ldi r16, COM2_ERROR_NOTFORME
|
||||||
|
rjmp uartBitbang_ReceivePacketIntoBuffer_error ; clc/ret
|
||||||
|
#endif
|
||||||
|
uartBitbang_ReceivePacketIntoBuffer_acceptAddr:
|
||||||
|
st X+, r16 ; store dest address, lock buffer
|
||||||
|
; read msg length
|
||||||
|
rcall uartBitbang_ReceiveByte ; read packet length (R16, R17, R20, R21, R22)
|
||||||
|
brcc uartBitbang_ReceivePacketIntoBuffer_ioError
|
||||||
|
st X+, r16
|
||||||
|
cp r16, r18 ; (COM2_BUFFER_SIZE-3)
|
||||||
|
brcc uartBitbang_ReceivePacketIntoBuffer_contentError ; packet too long
|
||||||
|
inc r16 ; account for checksum byte
|
||||||
|
mov r17, r16
|
||||||
|
uartBitbang_ReceivePacketIntoBuffer_loop:
|
||||||
|
push r17
|
||||||
|
rcall uartBitbang_ReceiveByte ; read byte (R16, R17, R20, R21, R22)
|
||||||
|
pop r17
|
||||||
|
brcc uartBitbang_ReceivePacketIntoBuffer_ioError
|
||||||
|
st X+, r16
|
||||||
|
dec r17
|
||||||
|
brne uartBitbang_ReceivePacketIntoBuffer_loop
|
||||||
|
sec
|
||||||
|
ret
|
||||||
|
uartBitbang_ReceivePacketIntoBuffer_ioError:
|
||||||
|
ldi r16, COM2_ERROR_IOERROR
|
||||||
|
rjmp uartBitbang_ReceivePacketIntoBuffer_error
|
||||||
|
uartBitbang_ReceivePacketIntoBuffer_contentError:
|
||||||
|
ldi r16, COM2_ERROR_DATAERROR
|
||||||
|
uartBitbang_ReceivePacketIntoBuffer_error:
|
||||||
|
clc
|
||||||
|
ret
|
||||||
|
; @end
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
; ---------------------------------------------------------------------------
|
||||||
|
; @routine uartBitbang_SendPacket
|
||||||
|
;
|
||||||
|
; Send packet over wire, handle ATTN line.
|
||||||
|
;
|
||||||
|
; @param X ptr to buffer to send
|
||||||
|
; @return CFLAGS set if okay, cleared otherwise (errorcode in R16)
|
||||||
|
; @clobbers R16, R22 (R17, R21, X)
|
||||||
|
|
||||||
|
uartBitbang_SendPacket:
|
||||||
|
rcall uartBitbang_AcquireBus
|
||||||
|
brcc uartBitbang_SendPacket_lineBusyError
|
||||||
|
|
||||||
|
rcall uartBitbang_WaitForOneBitLength ; wait for one bit duration (R22)
|
||||||
|
rcall uartBitbang_WaitForOneBitLength ; wait for one bit duration (R22)
|
||||||
|
|
||||||
|
adiw xh:xl, COM2_MSG_OFFS_MSGLEN
|
||||||
|
ld r17, X
|
||||||
|
sbiw xh:xl, COM2_MSG_OFFS_MSGLEN
|
||||||
|
inc r17 ; account for dest addr
|
||||||
|
inc r17 ; account for msglen byte
|
||||||
|
inc r17 ; account for crc byte
|
||||||
|
|
||||||
|
uartBitbang_SendPacket_loop:
|
||||||
|
ld r16, X+
|
||||||
|
rcall uartBitbang_SendByte ; send byte (R16, R21, R22)
|
||||||
|
brcc uartBitbang_SendPacket_releaseBusRet
|
||||||
|
dec r17
|
||||||
|
brne uartBitbang_SendPacket_loop
|
||||||
|
sec
|
||||||
|
uartBitbang_SendPacket_releaseBusRet:
|
||||||
|
cbi COM_ATTN_DDR, COM_ATTN_PIN ; release ATTN line (by setting direction to IN)
|
||||||
|
brcc uartBitbang_SendPacket_ioError
|
||||||
|
; packet successfully sent
|
||||||
|
ret
|
||||||
|
uartBitbang_SendPacket_ioError:
|
||||||
|
ldi r16,COM2_ERROR_COLLISION
|
||||||
|
ret
|
||||||
|
uartBitbang_SendPacket_lineBusyError:
|
||||||
|
ldi r16,COM2_ERROR_BUSY
|
||||||
|
ret
|
||||||
|
; @end
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
; ---------------------------------------------------------------------------
|
||||||
|
; @routine uartBitbang_AcquireBus
|
||||||
|
;
|
||||||
|
; Reserve bus if free (otherwise return error)
|
||||||
|
; Expects interrupts to be disabled.
|
||||||
|
;
|
||||||
|
; @return CFLAG set if okay (bus acquired), cleared on error
|
||||||
|
; @clobbers: none
|
||||||
|
|
||||||
|
uartBitbang_AcquireBus:
|
||||||
|
; check for ATTN line: busy?
|
||||||
|
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable pullup on ATTN
|
||||||
|
cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as input
|
||||||
|
nop ; needed to sample current input
|
||||||
|
sbis COM_ATTN_INPUT, COM_ATTN_PIN ; ATTN low?
|
||||||
|
rjmp uartBitbang_AcquireBus_busy ; jump if it is
|
||||||
|
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; set ATTN low
|
||||||
|
sbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as output
|
||||||
|
sec
|
||||||
|
ret
|
||||||
|
uartBitbang_AcquireBus_busy:
|
||||||
|
clc
|
||||||
|
ret
|
||||||
|
; @end
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
; ---------------------------------------------------------------------------
|
||||||
|
; @routine uartBitbang_WaitForOneBitLength
|
||||||
|
;
|
||||||
|
; wait for one bit length (minus cycles for call and ret).
|
||||||
|
;
|
||||||
|
; @clobbers r22
|
||||||
|
|
||||||
|
uartBitbang_WaitForOneBitLength:
|
||||||
|
Utils_WaitNanoSecs COM_BIT_LENGTH, 7, r22 ; wait for one bit duration (minus RCALL/RET)
|
||||||
|
ret
|
||||||
|
; @end
|
||||||
|
|
||||||
|
|
||||||
Reference in New Issue
Block a user