r05, comOnUart0 and comOnUart1 work!
This commit is contained in:
Martin Preuss
@@ -129,12 +129,12 @@
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reti ; 21: SPI SPI Serial Transfer Complete
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reti ; 22: USART0_RXS USART0 Rx Start
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rjmp ComOnUart0_RxCharIsr ; 23: USART0_RXC USART0 Rx Complete
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rjmp ComOnUart0_TxUdreIsr ; 24: USART0_DRE USART0 Data Register Empty
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rjmp ComOnUart0_TxCharIsr ; 25: USART0_TXC USART0 Tx Complete
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reti ; 24: USART0_DRE USART0 Data Register Empty
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reti ; 25: USART0_TXC USART0 Tx Complete
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reti ; 26: USART1_RXS USART1 Rx Start
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rjmp ComOnUart1_RxCharIsr ; 27: USART1_RXC USART1 Rx Complete
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rjmp ComOnUart1_TxUdreIsr ; 28: USART1_DRE USART1 Data Register Empty
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rjmp ComOnUart1_TxCharIsr ; 29: USART1_TXC USART1 Tx Complete
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reti ; 28: USART1_DRE USART1 Data Register Empty
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reti ; 29: USART1_TXC USART1 Tx Complete
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reti ; 30: TWI Two-Wire-Interface
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reti ; 31: RESERVED reserved
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@@ -162,6 +162,13 @@ firmwareStart:
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; @routine onSystemStart
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onSystemStart:
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; set interface number for UART0
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ldi r16, COMONUART0_IFACENUM
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sts comOnUart0_iface+NET_IFACE_OFFS_IFACENUM, r16
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; set interface number for UART1
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ldi r16, COMONUART1_IFACENUM
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sts comOnUart1_iface+NET_IFACE_OFFS_IFACENUM, r16
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ret
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; @end
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@@ -230,7 +237,7 @@ checkRecvdMsg:
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; forward to other interface
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ld r17, X
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andi r17, (NET_IFACE_BUFFER_IFACENUM1_BIT | NET_IFACE_BUFFER_IFACENUM0_BIT)
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andi r17, (1<<NET_IFACE_BUFFER_IFACENUM1_BIT) | (1<<NET_IFACE_BUFFER_IFACENUM0_BIT)
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rcall reverseInterfaceNum ; (R16, R17)
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; ldi r17, COMONUART0_IFACENUM ; DEBUG: send everything to uart0 to test that code first
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rcall addMsgToInterface
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@@ -288,6 +295,7 @@ letSysHandleMsg_end:
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reverseInterfaceNum:
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ldi r16, (1<<NET_IFACE_BUFFER_IFACENUM1_BIT) | (1<<NET_IFACE_BUFFER_IFACENUM0_BIT)
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eor r17, r16
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and r17, r16
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ret
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; @end
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@@ -319,6 +327,9 @@ addMsgToInterface_end:
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sendPacketsIface2In:
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ldi yl, LOW(netInterfaceData)
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ldi yh, HIGH(netInterfaceData)
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; ldi yl, LOW(comOnUart1_iface)
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; ldi yh, HIGH(comOnUart1_iface)
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ldi r17, AQHOME_VALUEID_STATS_PACKETS_IN2
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lds r18, comOnUart1_iface+NET_IFACE_OFFS_PACKETSIN_LOW
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lds r19, comOnUart1_iface+NET_IFACE_OFFS_PACKETSIN_HIGH
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@@ -75,8 +75,8 @@
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;#define MODULES_MOTION
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#define MODULES_NETWORK
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;#define MODULES_TTYONUART1
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;#define MODULES_COMONUART0
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#define MODULES_COMONUART1
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#define MODULES_COMONUART0
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;#define MODULES_COMONUART1
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#define APPS_STATS
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#define APPS_NETWORK
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@@ -113,9 +113,10 @@
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rjmp BOOTLOADER_ADDR ; 1: RESET Reset vector use this for flashed system
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reti ; 2: INT0 External Interrupt Request 0
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; rjmp ComOnUart0_AttnChangeIsr ; 3: PCINT0 Pin Change Interrupt 0
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reti ; 3: PCINT0 Pin Change Interrupt 0
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rjmp ComOnUart1_AttnChangeIsr ; 4: PCINT1 Pin Change Interrupt 1
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rjmp ComOnUart0_AttnChangeIsr ; 3: PCINT0 Pin Change Interrupt 0
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; reti ; 3: PCINT0 Pin Change Interrupt 0
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; rjmp ComOnUart1_AttnChangeIsr ; 4: PCINT1 Pin Change Interrupt 1
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reti ; 4: PCINT1 Pin Change Interrupt 1
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reti ; 5: WDT Watchdog Time-out
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reti ; 6: TIM1_CAPT Timer/Counter1 Capture Event
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reti ; 7: TIM1_COMPA (OC1A) Timer/Counter1 Compare Match A
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@@ -134,19 +135,17 @@
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reti ; 20: TIM2_OVF (OVF2) Timer/Counter2 Overflow
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reti ; 21: SPI SPI Serial Transfer Complete
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reti ; 22: USART0_RXS USART0 Rx Start
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; rjmp ComOnUart0_RxCharIsr ; 23: USART0_RXC USART0 Rx Complete
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reti ; 23: USART0_RXC USART0 Rx Complete
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rjmp ComOnUart0_RxCharIsr ; 23: USART0_RXC USART0 Rx Complete
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; reti ; 23: USART0_RXC USART0 Rx Complete
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; rjmp ComOnUart0_TxUdreIsr ; 24: USART0_DRE USART0 Data Register Empty
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reti ; 24: USART0_DRE USART0 Data Register Empty
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; rjmp ComOnUart0_TxCharIsr ; 25: USART0_TXC USART0 Tx Complete
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reti ; 25: USART0_TXC USART0 Tx Complete
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reti ; 26: USART1_RXS USART1 Rx Start
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rjmp ComOnUart1_RxCharIsr ; 27: USART1_RXC USART1 Rx Complete
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; reti ; 27: USART1_RXC USART1 Rx Complete
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rjmp ComOnUart1_TxUdreIsr ; 28: USART1_DRE USART1 Data Register Empty
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; reti ; 28: USART1_DRE USART1 Data Register Empty
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rjmp ComOnUart1_TxCharIsr ; 29: USART1_TXC USART1 Tx Complete
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; reti ; 29: USART1_TXC USART1 Tx Complete
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; rjmp ComOnUart1_RxCharIsr ; 27: USART1_RXC USART1 Rx Complete
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reti ; 27: USART1_RXC USART1 Rx Complete
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reti ; 28: USART1_DRE USART1 Data Register Empty
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reti ; 29: USART1_TXC USART1 Tx Complete
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reti ; 30: TWI Two-Wire-Interface
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reti ; 31: RESERVED reserved
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@@ -175,11 +174,11 @@ firmwareStart:
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onSystemStart:
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; set interface number for UART0
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; ldi r16, COMONUART0_IFACENUM
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; sts comOnUart0_iface+NET_IFACE_OFFS_IFACENUM, r16
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ldi r16, COMONUART0_IFACENUM
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sts comOnUart0_iface+NET_IFACE_OFFS_IFACENUM, r16
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; set interface number for UART1
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ldi r16, COMONUART1_IFACENUM
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sts comOnUart1_iface+NET_IFACE_OFFS_IFACENUM, r16
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; ldi r16, COMONUART1_IFACENUM
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; sts comOnUart1_iface+NET_IFACE_OFFS_IFACENUM, r16
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ret
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; @end
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@@ -236,7 +235,7 @@ onMessageReceived:
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; ---------------------------------------------------------------------------
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; defines for network interface
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.equ netInterfaceData = comOnUart1_iface
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.equ netInterfaceData = comOnUart0_iface
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;.equ netInterfaceData2 = comOnUart1_iface
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@@ -33,15 +33,16 @@ ComOnUart0_Init:
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ldi yl, LOW(comOnUart0_iface)
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ldi yh, HIGH(comOnUart0_iface)
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rcall NET_Interface_Init ; (R16, R17, X)
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ldi r16, 0xff
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std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
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ldi r16, UART_HW2_MODE_IDLE
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std Y+UART_HW2_IFACE_OFFS_MODE, r16
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clr r16
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std Y+NET_IFACE_OFFS_IFACENUM, r16
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rcall comOnUart0SetAttnInput
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sbi COM_IRQ_ADDR_ATTN0, COM_IRQ_BIT_ATTN0 ; enable pin change irq for ATTN line
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inr r16, COM_IRQ_ADDR_ATTN0
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sbr r16, (1<<COM_IRQ_BIT_ATTN0) ; enable pin change irq for ATTN line
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outr COM_IRQ_ADDR_ATTN0, r16
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inr r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
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sbr r16, (1<<COM_IRQ_GIMSK_ATTN0)
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outr GIMSK, r16
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@@ -143,70 +144,6 @@ comOnUart0StartReading:
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; ---------------------------------------------------------------------------
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; @routine comOnUart0StartWriting
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;
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; @param Y pointer to interface data in SRAM
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; @param R16 buffer number
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; @return CFLAG set if writing started, cleared otherwise
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; @clobbers R16, R17, X, Z (R22, R24, R25)
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comOnUart0StartWriting:
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push r15
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inr r15, SREG
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cli
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rcall comOnUart0StartWriting_noIrq
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brcc comOnUart0StartWriting_clc
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outr SREG, r15
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pop r15
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sec
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ret
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comOnUart0StartWriting_clc:
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outr SREG, r15
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pop r15
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clc
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ret
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comOnUart0StartWriting_noIrq:
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rcall comOnUart0AcquireAttn ; (R22)
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brcc comOnUart0StartWriting_ebusy
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; copy buffer
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rcall NET_Buffer_Locate ; (R17)
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std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
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adiw xh:xl, NETMSG_OFFS_MSGLEN+1
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ld r17, X
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sbiw xh:xl, NETMSG_OFFS_MSGLEN+1
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subi r17, -3 ; add dest addr, msglen, crc
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; TODO: check size!
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std Y+UART_HW2_IFACE_OFFS_BUFUSED, r17
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std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
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; copy into IFACE buffer
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mov zl, yl
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mov zh, yh
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adiw zh:zl, UART_HW2_IFACE_OFFS_BUFFER ; dest
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std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, zl
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std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, zh
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adiw xh:xl, 1 ; src (skip buffer header)
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comOnUart0StartWriting_loop:
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ld r16, X+
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st Z+, r16
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dec r17
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brne comOnUart0StartWriting_loop
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ldi r16, UART_HW2_MODE_WRITING
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rcall comOnUart0SetMode ; (R17)
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rcall comOnUart0StartTx ; should be the last call here (R16)
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sec
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rjmp comOnUart0StartWriting_end
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comOnUart0StartWriting_ebusy:
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ldi r16, NET_IFACE_OFFS_ERR_BUSY_LOW
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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clc
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comOnUart0StartWriting_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ComOnUart0_Run @global
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;
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@@ -251,10 +188,7 @@ comOnUart0ModeJumpTable:
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rjmp comOnUart0RunIdle
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rjmp comOnUart0RunReading
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rjmp comOnUart0RunSkipping
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rjmp comOnUart0RunMsgReceived
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rjmp comOnUart0RunWriting
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rjmp comOnUart0RunWaitBufferEmpty
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rjmp comOnUart0RunMsgSent
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; @end
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@@ -263,15 +197,48 @@ comOnUart0ModeJumpTable:
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; @routine comOnUart0RunIdle
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers R16, R17, R24, R25, X, Z
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; @clobbers R16, R17, R22, R24, R25, X
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comOnUart0RunIdle:
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push r15
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inr r15, SREG
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cli
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; look for outbound message
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rcall NET_Interface_PeekNextOutgoingMsgNum ; r16=msgNum
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brcc comOnUart0RunIdle_end ; no outmsg in queue
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rcall comOnUart0StartWriting ; (R16, R17, R22, R24, R25, X, Z)
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brcs comOnUart0RunIdle_haveMsg
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out SREG, r15
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pop r15
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rjmp comOnUart0RunIdle_end
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comOnUart0RunIdle_haveMsg:
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mov r24, r16
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ldi r16, UART_HW2_MODE_WRITING
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rcall comOnUart0SetMode ; (R17)
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mov r16, r24
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out SREG, r15
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pop r15
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push r16
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rcall NET_Buffer_Locate ; (R17)
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adiw xh:xl, 1
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rcall comOnUart0SendMsg ; (R16, R17, R22, R24, R25, X)
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push r15
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inr r15, SREG ; save SREG (no CLI, we want to save CFLAG only)
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ldi r16, UART_HW2_MODE_IDLE
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rcall comOnUart0SetMode ; (R17)
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out SREG, r15 ; restore SREG
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pop r15
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pop r16
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brcc comOnUart0RunIdle_end
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push r15
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inr r15, SREG
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cli
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rcall NET_Interface_GetNextOutgoingMsgNum ; take current msg off the queue
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rcall NET_Buffer_ReleaseByNum ; (R16, X)
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out SREG, r15
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pop r15
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sec
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comOnUart0RunIdle_end:
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ret
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; @end
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@@ -308,12 +275,12 @@ comOnUart0RunSkipping_end:
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunMsgReceived
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; @routine comOnUart0HandleMsgReceived
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers R16, R17, R18, X, Z (R19, R20, R24, R25)
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comOnUart0RunMsgReceived:
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comOnUart0HandleMsgReceived:
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mov xl, yl
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mov xh, yh
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adiw xh:xl, UART_HW2_IFACE_OFFS_BUFFER
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@@ -371,42 +338,6 @@ comOnUart0RunWriting:
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunWaitBufferEmpty
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;
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; @clobbers none
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comOnUart0RunWaitBufferEmpty:
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; TODO: check for timeout etc.
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunWriting
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers R16 (R17, R22, R24, R25, X)
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comOnUart0RunMsgSent:
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ldd r16, Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM
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rcall NET_Buffer_ReleaseByNum ; (R16, X)
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ldi r16, 0xff
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std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
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ldi r16, NET_IFACE_OFFS_PACKETSOUT_LOW
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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ldi r16, UART_HW2_MODE_IDLE
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rcall comOnUart0SetMode ; (R17)
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rcall comOnUart0SetAttnInput ; release ATTN (none)
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rcall Utils_WaitFor10MicroSecs ; make sure ATTN is at least high for a short period (R22)
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0AcquireAttn
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;
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@@ -470,7 +401,8 @@ comOnUart0StartTx:
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cbr r16, (1<<TXC0) ; clear TXCn interrupt
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outr UCSR0A, r16
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inr r16, UCSR0B
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sbr r16, (1<<UDRIE0) | (1<<TXCIE0) | (1<<TXEN0) ; enable TX UDRE and TXC0 interrupt, enable transceive
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cbr r16, (1<<UDRIE0) | (1<<TXCIE0) ; disable TX UDRE and TXC0 interrupt, enable transceive
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sbr r16, (1<<TXEN0) ; enable TX UDRE and TXC0 interrupt, enable transceive
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outr UCSR0B, r16
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ret
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; @end
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@@ -484,7 +416,7 @@ comOnUart0StartTx:
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comOnUart0StopTx:
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inr r16, UCSR0B
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cbr r16, (1<<UDRIE0) | (1<<TXCIE0) | (1<<TXEN0) ; disable TX UDRE and TXC0 interrupt, enable transceive
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cbr r16, (1<<UDRIE0) | (1<<TXCIE0) | (1<<TXEN0) ; disable TX UDRE and TXC0 interrupt, disable transceive
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outr UCSR0B, r16
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ret
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; @end
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@@ -506,6 +438,13 @@ comOnUart0SetAttnInput:
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.else
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cbi COM_ATTN0_OUTPUT, COM_ATTN0_PIN ; disable pullup on ATTN
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.endif
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push r16
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inr r16, COM_IRQ_ADDR_ATTN0
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sbr r16, (1<<COM_IRQ_BIT_ATTN0) ; enable pin change irq for ATTN line
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outr COM_IRQ_ADDR_ATTN0, r16
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pop r16
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ret
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; @end
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@@ -519,6 +458,11 @@ comOnUart0SetAttnInput:
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; @clobbers none
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comOnUart0SetAttnLow:
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push r16
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inr r16, COM_IRQ_ADDR_ATTN0
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cbr r16, (1<<COM_IRQ_BIT_ATTN0) ; disable pin change irq for ATTN line
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outr COM_IRQ_ADDR_ATTN0, r16
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pop r16
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sbi COM_ATTN0_DDR, COM_ATTN0_PIN ; set ATTN as output
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cbi COM_ATTN0_OUTPUT, COM_ATTN0_PIN ; set ATTN low
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ret
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@@ -552,21 +496,29 @@ ComOnUart0_RxCharIsr:
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push r16
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push r17
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push r18
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push r19
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push r20
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push r24
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push r25
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push xl
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push xh
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push yl
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push yh
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push zl
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push zh
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ldi yl, LOW(comOnUart0_iface)
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ldi yh, HIGH(comOnUart0_iface)
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rcall comOnUart0RxCharIsr ; (R16, R17, R18, R24, R25, X)
|
||||
rcall comOnUart0RxCharIsr ; (R16, R17, R18, R19, R20, R24, R25, X, Z)
|
||||
pop zh
|
||||
pop zl
|
||||
pop yh
|
||||
pop yl
|
||||
pop xh
|
||||
pop xl
|
||||
pop r25
|
||||
pop r24
|
||||
pop r20
|
||||
pop r19
|
||||
pop r18
|
||||
pop r17
|
||||
pop r16
|
||||
@@ -577,62 +529,6 @@ ComOnUart0_RxCharIsr:
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ComOnUart0_TxUdreIsr @global @isr
|
||||
;
|
||||
; @clobbers none
|
||||
|
||||
ComOnUart0_TxUdreIsr:
|
||||
push r15
|
||||
in r15, SREG
|
||||
push r16
|
||||
push r17
|
||||
push xl
|
||||
push xh
|
||||
push yl
|
||||
push yh
|
||||
ldi yl, LOW(comOnUart0_iface)
|
||||
ldi yh, HIGH(comOnUart0_iface)
|
||||
rcall comOnUart0TxUdreIsr ; (R16, R17, X)
|
||||
pop yh
|
||||
pop yl
|
||||
pop xh
|
||||
pop xl
|
||||
pop r17
|
||||
pop r16
|
||||
out SREG, r15
|
||||
pop r15
|
||||
reti
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ComOnUart0_TxCharIsr @global @isr
|
||||
;
|
||||
; @clobbers none
|
||||
|
||||
ComOnUart0_TxCharIsr:
|
||||
push r15
|
||||
in r15, SREG
|
||||
push r16
|
||||
push r17
|
||||
push yl
|
||||
push yh
|
||||
ldi yl, LOW(comOnUart0_iface)
|
||||
ldi yh, HIGH(comOnUart0_iface)
|
||||
rcall comOnUart0TxCharIsr ; (R16, R17)
|
||||
pop yh
|
||||
pop yl
|
||||
pop r17
|
||||
pop r16
|
||||
out SREG, r15
|
||||
pop r15
|
||||
reti
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ComOnUart0AttnChangeIsr @global @isr
|
||||
;
|
||||
@@ -707,7 +603,7 @@ comOnUart0ActOnAttn_end:
|
||||
; @routine comOnUart0RxCharIsr @global
|
||||
;
|
||||
; @param Y pointer to interface data in SRAM
|
||||
; @clobbers R16, R17, R18, R24, R25, X
|
||||
; @clobbers R16, R17, R18, R19, R20, R24, R25, X, Z
|
||||
|
||||
comOnUart0RxCharIsr:
|
||||
; check for errors
|
||||
@@ -749,8 +645,8 @@ comOnUart0RxCharIsr:
|
||||
brne comOnUart0RxCharIsr_end ; jmp if still bytes left to receive
|
||||
comOnUart0RxCharIsr_complete:
|
||||
rcall comOnUart0StopRx
|
||||
ldi r16, UART_HW2_MODE_MSGRECEIVED
|
||||
rcall comOnUart0SetMode ; (R17)
|
||||
rcall comOnUart0HandleMsgReceived ; (R16, R17, R18, R19, R20, R24, R25, X, Z)
|
||||
|
||||
rjmp comOnUart0RxCharIsr_end
|
||||
comOnUart0RxCharIsr_hwerr:
|
||||
ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
|
||||
@@ -772,76 +668,54 @@ comOnUart0RxCharIsr_end:
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine comOnUart0TxUdreIsr @global
|
||||
; @routine comOnUart0SendMsg
|
||||
;
|
||||
; Handler for UDRE1 interrupt called when TX data register is empty.
|
||||
;
|
||||
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
|
||||
; @clobbers R16, R17, X
|
||||
; @param Y pointer to interface data in SRAM
|
||||
; @param X pointer to buffer to send
|
||||
; @return CFLAG set if writing started, cleared otherwise
|
||||
; @clobbers R16, R17, X (R22, R24, R25)
|
||||
|
||||
comOnUart0TxUdreIsr:
|
||||
comOnUart0SendMsg:
|
||||
rcall comOnUart0AcquireAttn ; (R22)
|
||||
brcc comOnUart0SendMsg_ebusy
|
||||
adiw xh:xl, NETMSG_OFFS_MSGLEN
|
||||
ld r17, X
|
||||
sbiw xh:xl, NETMSG_OFFS_MSGLEN
|
||||
subi r17, -3 ; add dest addr, msglen, crc
|
||||
rcall comOnUart0StartTx ; (R16)
|
||||
; TODO: check size!
|
||||
; r17=number of bytes to write, X=buffer
|
||||
comOnUart0SendMsg_loop:
|
||||
; wait until transceiver ready
|
||||
inr r16, UCSR0A
|
||||
sbrs r16, UDRE0
|
||||
rjmp comOnUart0TxUdreIsr_disable_irq ; not ready
|
||||
; check bytes left
|
||||
ldd r17, Y+UART_HW2_IFACE_OFFS_BUFLEFT
|
||||
tst r17
|
||||
breq comOnUart0TxUdreIsr_finished
|
||||
; read byte
|
||||
ldd xl, Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW
|
||||
ldd xh, Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH
|
||||
rjmp comOnUart0SendMsg_loop
|
||||
; clear TXC flag by sending a 1
|
||||
sbr r16, (1<<TXC0)
|
||||
outr UCSR0A, r16
|
||||
; write byte to uart data register
|
||||
ld r16, X+
|
||||
std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, xl
|
||||
std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
|
||||
; send byte
|
||||
outr UDR0, r16 ; send byte
|
||||
; decreased counter
|
||||
outr UDR0, r16
|
||||
dec r17
|
||||
std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
|
||||
brne comOnUart0TxUdreIsr_end ; still bytes left to send, jump
|
||||
comOnUart0TxUdreIsr_finished:
|
||||
ldi r16, UART_HW2_MODE_WAITBUFFEREMPTY
|
||||
rcall comOnUart0SetMode ; (R17)
|
||||
comOnUart0TxUdreIsr_disable_irq:
|
||||
; disable further DRE interrupts
|
||||
inr r16, UCSR0B
|
||||
cbr r16, (1<<UDRIE0) ; disable TX data register empty interrupt
|
||||
outr UCSR0B, r16
|
||||
comOnUart0TxUdreIsr_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine comOnUart0TxCharIsr @global
|
||||
;
|
||||
; Handler for TXC0 interrupt called when the last byte has been completely sent and
|
||||
; the data register is empty.
|
||||
;
|
||||
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
|
||||
; @clobbers R16, R17
|
||||
|
||||
comOnUart0TxCharIsr:
|
||||
; disable further TXC interrupts
|
||||
inr r16, UCSR0B
|
||||
cbr r16, (1<<TXCIE0) ; disable TXC1 interrupt
|
||||
outr UCSR0B, r16
|
||||
brne comOnUart0SendMsg_loop
|
||||
; wait until all data send (i.e. send buffer empty and all bits shifted out)
|
||||
comOnUart0SendMsg_loopComplete:
|
||||
inr r16, UCSR0A
|
||||
sbrs r16, TXC0
|
||||
rjmp comOnUart0SendMsg_loopComplete
|
||||
rcall comOnUart0StopTx ; (R16)
|
||||
ldi r16, UART_HW2_MODE_MSGSENT
|
||||
rcall comOnUart0SetMode ; (R17)
|
||||
rcall comOnUart0SetAttnInput ; release ATTN (none)
|
||||
rcall Utils_WaitFor10MicroSecs ; make sure ATTN is at least high for a short period (R22)
|
||||
sec
|
||||
rjmp comOnUart0SendMsg_end
|
||||
comOnUart0SendMsg_ebusy:
|
||||
ldi r16, NET_IFACE_OFFS_ERR_BUSY_LOW
|
||||
rcall NET_Interface_IncCounter16 ; (R24, R25)
|
||||
clc
|
||||
comOnUart0SendMsg_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif ; AVR_MODULES_UART_HW2_COMONUART0_H
|
||||
|
||||
@@ -33,21 +33,12 @@ ComOnUart1_Init:
|
||||
ldi yl, LOW(comOnUart1_iface)
|
||||
ldi yh, HIGH(comOnUart1_iface)
|
||||
rcall NET_Interface_Init ; (R16, R17, X)
|
||||
ldi r16, 0xff
|
||||
std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
|
||||
ldi r16, UART_HW2_MODE_IDLE
|
||||
std Y+UART_HW2_IFACE_OFFS_MODE, r16
|
||||
clr r16
|
||||
std Y+NET_IFACE_OFFS_IFACENUM, r16
|
||||
|
||||
rcall comOnUart1SetAttnInput
|
||||
|
||||
.ifdef COM_ATTN1_PUE
|
||||
inr r16, COM_ATTN1_PUE
|
||||
cbr r16, (1<<COM_ATTN1_PIN)
|
||||
outr COM_ATTN1_PUE, r16
|
||||
.endif
|
||||
|
||||
inr r16, COM_IRQ_ADDR_ATTN1
|
||||
sbr r16, (1<<COM_IRQ_BIT_ATTN1) ; enable pin change irq for ATTN line
|
||||
outr COM_IRQ_ADDR_ATTN1, r16
|
||||
@@ -153,84 +144,12 @@ comOnUart1StartReading:
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine comOnUart1StartWriting
|
||||
;
|
||||
; @param Y pointer to interface data in SRAM
|
||||
; @param R16 buffer number
|
||||
; @return CFLAG set if writing started, cleared otherwise
|
||||
; @clobbers R16, R17, X, Z (R22, R24, R25)
|
||||
|
||||
comOnUart1StartWriting:
|
||||
push r15
|
||||
inr r15, SREG
|
||||
cli
|
||||
rcall comOnUart1StartWriting_noIrq
|
||||
brcc comOnUart1StartWriting_clc
|
||||
outr SREG, r15
|
||||
pop r15
|
||||
sec
|
||||
ret
|
||||
comOnUart1StartWriting_clc:
|
||||
outr SREG, r15
|
||||
pop r15
|
||||
clc
|
||||
ret
|
||||
|
||||
comOnUart1StartWriting_noIrq:
|
||||
rcall comOnUart1AcquireAttn ; (R22)
|
||||
brcc comOnUart1StartWriting_ebusy
|
||||
; copy buffer
|
||||
rcall NET_Buffer_Locate ; (R17)
|
||||
std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
|
||||
adiw xh:xl, NETMSG_OFFS_MSGLEN+1
|
||||
ld r17, X
|
||||
sbiw xh:xl, NETMSG_OFFS_MSGLEN+1
|
||||
subi r17, -3 ; add dest addr, msglen, crc
|
||||
; TODO: check size!
|
||||
std Y+UART_HW2_IFACE_OFFS_BUFUSED, r17
|
||||
std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
|
||||
; copy into IFACE buffer
|
||||
mov zl, yl
|
||||
mov zh, yh
|
||||
adiw zh:zl, UART_HW2_IFACE_OFFS_BUFFER ; dest
|
||||
std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, zl
|
||||
std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, zh
|
||||
adiw xh:xl, 1 ; src (skip buffer header)
|
||||
comOnUart1StartWriting_loop:
|
||||
ld r16, X+
|
||||
st Z+, r16
|
||||
dec r17
|
||||
brne comOnUart1StartWriting_loop
|
||||
ldi r16, UART_HW2_MODE_WRITING
|
||||
rcall comOnUart1SetMode ; (R17)
|
||||
rcall comOnUart1StartTx ; should be the last call here (R16)
|
||||
sec
|
||||
rjmp comOnUart1StartWriting_end
|
||||
comOnUart1StartWriting_ebusy:
|
||||
ldi r16, NET_IFACE_OFFS_ERR_BUSY_LOW
|
||||
rcall NET_Interface_IncCounter16 ; (R24, R25)
|
||||
clc
|
||||
comOnUart1StartWriting_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ComOnUart1_Run @global
|
||||
;
|
||||
; @clobbers all
|
||||
|
||||
ComOnUart1_Run:
|
||||
push r15
|
||||
inr r15, SREG
|
||||
cli
|
||||
rcall ComOnUart1_Run_noirq
|
||||
outr SREG, r15
|
||||
pop r15
|
||||
ret
|
||||
ComOnUart1_Run_noirq:
|
||||
ldi yl, LOW(comOnUart1_iface)
|
||||
ldi yh, HIGH(comOnUart1_iface)
|
||||
ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
|
||||
@@ -269,10 +188,7 @@ comOnUart1ModeJumpTable:
|
||||
rjmp comOnUart1RunIdle
|
||||
rjmp comOnUart1RunReading
|
||||
rjmp comOnUart1RunSkipping
|
||||
rjmp comOnUart1RunMsgReceived
|
||||
rjmp comOnUart1RunWriting
|
||||
rjmp comOnUart1RunWaitBufferEmpty
|
||||
rjmp comOnUart1RunMsgSent
|
||||
; @end
|
||||
|
||||
|
||||
@@ -281,15 +197,48 @@ comOnUart1ModeJumpTable:
|
||||
; @routine comOnUart1RunIdle
|
||||
;
|
||||
; @param Y pointer to interface data in SRAM
|
||||
; @clobbers R16, R17, R24, R25, X, Z
|
||||
; @clobbers R16, R17, R22, R24, R25, X
|
||||
|
||||
comOnUart1RunIdle:
|
||||
push r15
|
||||
inr r15, SREG
|
||||
cli
|
||||
; look for outbound message
|
||||
rcall NET_Interface_PeekNextOutgoingMsgNum ; r16=msgNum
|
||||
brcc comOnUart1RunIdle_end ; no outmsg in queue
|
||||
rcall comOnUart1StartWriting ; (R16, R17, R22, R24, R25, X, Z)
|
||||
brcs comOnUart1RunIdle_haveMsg
|
||||
out SREG, r15
|
||||
pop r15
|
||||
rjmp comOnUart1RunIdle_end
|
||||
|
||||
comOnUart1RunIdle_haveMsg:
|
||||
mov r24, r16
|
||||
ldi r16, UART_HW2_MODE_WRITING
|
||||
rcall comOnUart1SetMode ; (R17)
|
||||
mov r16, r24
|
||||
out SREG, r15
|
||||
pop r15
|
||||
|
||||
push r16
|
||||
rcall NET_Buffer_Locate ; (R17)
|
||||
adiw xh:xl, 1
|
||||
rcall comOnUart1SendMsg ; (R16, R17, R22, R24, R25, X)
|
||||
push r15
|
||||
inr r15, SREG ; save SREG (no CLI, we want to save CFLAG only)
|
||||
ldi r16, UART_HW2_MODE_IDLE
|
||||
rcall comOnUart1SetMode ; (R17)
|
||||
out SREG, r15 ; restore SREG
|
||||
pop r15
|
||||
pop r16
|
||||
brcc comOnUart1RunIdle_end
|
||||
|
||||
push r15
|
||||
inr r15, SREG
|
||||
cli
|
||||
rcall NET_Interface_GetNextOutgoingMsgNum ; take current msg off the queue
|
||||
rcall NET_Buffer_ReleaseByNum ; (R16, X)
|
||||
out SREG, r15
|
||||
pop r15
|
||||
sec
|
||||
comOnUart1RunIdle_end:
|
||||
ret
|
||||
; @end
|
||||
@@ -326,12 +275,12 @@ comOnUart1RunSkipping_end:
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine comOnUart1RunMsgReceived
|
||||
; @routine comOnUart1HandleMsgReceived
|
||||
;
|
||||
; @param Y pointer to interface data in SRAM
|
||||
; @clobbers R16, R17, R18, X, Z (R19, R20, R24, R25)
|
||||
|
||||
comOnUart1RunMsgReceived:
|
||||
comOnUart1HandleMsgReceived:
|
||||
mov xl, yl
|
||||
mov xh, yh
|
||||
adiw xh:xl, UART_HW2_IFACE_OFFS_BUFFER
|
||||
@@ -389,42 +338,6 @@ comOnUart1RunWriting:
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine comOnUart1RunWaitBufferEmpty
|
||||
;
|
||||
; @clobbers none
|
||||
|
||||
comOnUart1RunWaitBufferEmpty:
|
||||
; TODO: check for timeout etc.
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine comOnUart1RunWriting
|
||||
;
|
||||
; @param Y pointer to interface data in SRAM
|
||||
; @clobbers R16 (R17, R22, R24, R25, X)
|
||||
|
||||
comOnUart1RunMsgSent:
|
||||
ldd r16, Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM
|
||||
rcall NET_Buffer_ReleaseByNum ; (R16, X)
|
||||
ldi r16, 0xff
|
||||
std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
|
||||
ldi r16, NET_IFACE_OFFS_PACKETSOUT_LOW
|
||||
rcall NET_Interface_IncCounter16 ; (R24, R25)
|
||||
ldi r16, UART_HW2_MODE_IDLE
|
||||
rcall comOnUart1SetMode ; (R17)
|
||||
rcall comOnUart1SetAttnInput ; release ATTN (none)
|
||||
rcall Utils_WaitFor10MicroSecs ; make sure ATTN is at least high for a short period (R22)
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine comOnUart1AcquireAttn
|
||||
;
|
||||
@@ -488,7 +401,8 @@ comOnUart1StartTx:
|
||||
cbr r16, (1<<TXC1) ; clear TXCn interrupt
|
||||
outr UCSR1A, r16
|
||||
inr r16, UCSR1B
|
||||
sbr r16, (1<<UDRIE1) | (1<<TXCIE1) | (1<<TXEN1) ; enable TX UDRE and TXC0 interrupt, enable transceive
|
||||
cbr r16, (1<<UDRIE1) | (1<<TXCIE1) ; disable TX UDRE and TXC0 interrupt, enable transceive
|
||||
sbr r16, (1<<TXEN1) ; enable TX UDRE and TXC0 interrupt, enable transceive
|
||||
outr UCSR1B, r16
|
||||
ret
|
||||
; @end
|
||||
@@ -502,7 +416,7 @@ comOnUart1StartTx:
|
||||
|
||||
comOnUart1StopTx:
|
||||
inr r16, UCSR1B
|
||||
cbr r16, (1<<UDRIE1) | (1<<TXCIE1) | (1<<TXEN1) ; disable TX UDRE and TXC0 interrupt, enable transceive
|
||||
cbr r16, (1<<UDRIE1) | (1<<TXCIE1) | (1<<TXEN1) ; disable TX UDRE and TXC0 interrupt, disable transceive
|
||||
outr UCSR1B, r16
|
||||
ret
|
||||
; @end
|
||||
@@ -524,6 +438,13 @@ comOnUart1SetAttnInput:
|
||||
.else
|
||||
cbi COM_ATTN1_OUTPUT, COM_ATTN1_PIN ; disable pullup on ATTN
|
||||
.endif
|
||||
|
||||
push r16
|
||||
inr r16, COM_IRQ_ADDR_ATTN1
|
||||
sbr r16, (1<<COM_IRQ_BIT_ATTN1) ; enable pin change irq for ATTN line
|
||||
outr COM_IRQ_ADDR_ATTN1, r16
|
||||
pop r16
|
||||
|
||||
ret
|
||||
; @end
|
||||
|
||||
@@ -537,6 +458,11 @@ comOnUart1SetAttnInput:
|
||||
; @clobbers none
|
||||
|
||||
comOnUart1SetAttnLow:
|
||||
push r16
|
||||
inr r16, COM_IRQ_ADDR_ATTN1
|
||||
cbr r16, (1<<COM_IRQ_BIT_ATTN1) ; disable pin change irq for ATTN line
|
||||
outr COM_IRQ_ADDR_ATTN1, r16
|
||||
pop r16
|
||||
sbi COM_ATTN1_DDR, COM_ATTN1_PIN ; set ATTN as output
|
||||
cbi COM_ATTN1_OUTPUT, COM_ATTN1_PIN ; set ATTN low
|
||||
ret
|
||||
@@ -570,21 +496,29 @@ ComOnUart1_RxCharIsr:
|
||||
push r16
|
||||
push r17
|
||||
push r18
|
||||
push r19
|
||||
push r20
|
||||
push r24
|
||||
push r25
|
||||
push xl
|
||||
push xh
|
||||
push yl
|
||||
push yh
|
||||
push zl
|
||||
push zh
|
||||
ldi yl, LOW(comOnUart1_iface)
|
||||
ldi yh, HIGH(comOnUart1_iface)
|
||||
rcall comOnUart1RxCharIsr ; (R16, R17, R18, R24, R25, X)
|
||||
rcall comOnUart1RxCharIsr ; (R16, R17, R18, R19, R20, R24, R25, X, Z)
|
||||
pop zh
|
||||
pop zl
|
||||
pop yh
|
||||
pop yl
|
||||
pop xh
|
||||
pop xl
|
||||
pop r25
|
||||
pop r24
|
||||
pop r20
|
||||
pop r19
|
||||
pop r18
|
||||
pop r17
|
||||
pop r16
|
||||
@@ -595,62 +529,6 @@ ComOnUart1_RxCharIsr:
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ComOnUart1_TxUdreIsr @global @isr
|
||||
;
|
||||
; @clobbers none
|
||||
|
||||
ComOnUart1_TxUdreIsr:
|
||||
push r15
|
||||
in r15, SREG
|
||||
push r16
|
||||
push r17
|
||||
push xl
|
||||
push xh
|
||||
push yl
|
||||
push yh
|
||||
ldi yl, LOW(comOnUart1_iface)
|
||||
ldi yh, HIGH(comOnUart1_iface)
|
||||
rcall comOnUart1TxUdreIsr ; (R16, R17, X)
|
||||
pop yh
|
||||
pop yl
|
||||
pop xh
|
||||
pop xl
|
||||
pop r17
|
||||
pop r16
|
||||
out SREG, r15
|
||||
pop r15
|
||||
reti
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ComOnUart1_TxCharIsr @global @isr
|
||||
;
|
||||
; @clobbers none
|
||||
|
||||
ComOnUart1_TxCharIsr:
|
||||
push r15
|
||||
in r15, SREG
|
||||
push r16
|
||||
push r17
|
||||
push yl
|
||||
push yh
|
||||
ldi yl, LOW(comOnUart1_iface)
|
||||
ldi yh, HIGH(comOnUart1_iface)
|
||||
rcall comOnUart1TxCharIsr ; (R16, R17)
|
||||
pop yh
|
||||
pop yl
|
||||
pop r17
|
||||
pop r16
|
||||
out SREG, r15
|
||||
pop r15
|
||||
reti
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ComOnUart1AttnChangeIsr @global @isr
|
||||
;
|
||||
@@ -701,10 +579,10 @@ ComOnUart1_HandleAttnChange:
|
||||
; @clobbers R16 (R17, X)
|
||||
|
||||
comOnUart1ActOnAttn:
|
||||
ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
|
||||
rcall comOnUart1IsAttnLow ; (none)
|
||||
brcc comOnUart1ActOnAttn_attnHigh
|
||||
; ATTN low
|
||||
ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
|
||||
cpi r16, UART_HW2_MODE_IDLE
|
||||
brne comOnUart1ActOnAttn_end ; not idle
|
||||
rcall comOnUart1StartReading ; (R16, R17, X)
|
||||
@@ -725,7 +603,7 @@ comOnUart1ActOnAttn_end:
|
||||
; @routine comOnUart1RxCharIsr @global
|
||||
;
|
||||
; @param Y pointer to interface data in SRAM
|
||||
; @clobbers R16, R17, R18, R24, R25, X
|
||||
; @clobbers R16, R17, R18, R19, R20, R24, R25, X, Z
|
||||
|
||||
comOnUart1RxCharIsr:
|
||||
; check for errors
|
||||
@@ -767,8 +645,8 @@ comOnUart1RxCharIsr:
|
||||
brne comOnUart1RxCharIsr_end ; jmp if still bytes left to receive
|
||||
comOnUart1RxCharIsr_complete:
|
||||
rcall comOnUart1StopRx
|
||||
ldi r16, UART_HW2_MODE_MSGRECEIVED
|
||||
rcall comOnUart1SetMode ; (R17)
|
||||
rcall comOnUart1HandleMsgReceived ; (R16, R17, R18, R19, R20, R24, R25, X, Z)
|
||||
|
||||
rjmp comOnUart1RxCharIsr_end
|
||||
comOnUart1RxCharIsr_hwerr:
|
||||
ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
|
||||
@@ -790,76 +668,54 @@ comOnUart1RxCharIsr_end:
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine comOnUart1TxUdreIsr @global
|
||||
; @routine comOnUart1SendMsg
|
||||
;
|
||||
; Handler for UDRE1 interrupt called when TX data register is empty.
|
||||
;
|
||||
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
|
||||
; @clobbers R16, R17, X
|
||||
; @param Y pointer to interface data in SRAM
|
||||
; @param X pointer to buffer to send
|
||||
; @return CFLAG set if writing started, cleared otherwise
|
||||
; @clobbers R16, R17, X (R22, R24, R25)
|
||||
|
||||
comOnUart1TxUdreIsr:
|
||||
comOnUart1SendMsg:
|
||||
rcall comOnUart1AcquireAttn ; (R22)
|
||||
brcc comOnUart1SendMsg_ebusy
|
||||
adiw xh:xl, NETMSG_OFFS_MSGLEN
|
||||
ld r17, X
|
||||
sbiw xh:xl, NETMSG_OFFS_MSGLEN
|
||||
subi r17, -3 ; add dest addr, msglen, crc
|
||||
rcall comOnUart1StartTx ; (R16)
|
||||
; TODO: check size!
|
||||
; r17=number of bytes to write, X=buffer
|
||||
comOnUart1SendMsg_loop:
|
||||
; wait until transceiver ready
|
||||
inr r16, UCSR1A
|
||||
sbrs r16, UDRE1
|
||||
rjmp comOnUart1TxUdreIsr_disable_irq ; not ready
|
||||
; check bytes left
|
||||
ldd r17, Y+UART_HW2_IFACE_OFFS_BUFLEFT
|
||||
tst r17
|
||||
breq comOnUart1TxUdreIsr_finished
|
||||
; read byte
|
||||
ldd xl, Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW
|
||||
ldd xh, Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH
|
||||
rjmp comOnUart1SendMsg_loop
|
||||
; clear TXC flag by sending a 1
|
||||
sbr r16, (1<<TXC1)
|
||||
outr UCSR1A, r16
|
||||
; write byte to uart data register
|
||||
ld r16, X+
|
||||
std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, xl
|
||||
std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
|
||||
; send byte
|
||||
outr UDR1, r16 ; send byte
|
||||
; decreased counter
|
||||
outr UDR1, r16
|
||||
dec r17
|
||||
std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
|
||||
brne comOnUart1TxUdreIsr_end ; still bytes left to send, jump
|
||||
comOnUart1TxUdreIsr_finished:
|
||||
ldi r16, UART_HW2_MODE_WAITBUFFEREMPTY
|
||||
rcall comOnUart1SetMode ; (R17)
|
||||
comOnUart1TxUdreIsr_disable_irq:
|
||||
; disable further DRE interrupts
|
||||
inr r16, UCSR1B
|
||||
cbr r16, (1<<UDRIE1) ; disable TX data register empty interrupt
|
||||
outr UCSR1B, r16
|
||||
comOnUart1TxUdreIsr_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine comOnUart1TxCharIsr @global
|
||||
;
|
||||
; Handler for TXC0 interrupt called when the last byte has been completely sent and
|
||||
; the data register is empty.
|
||||
;
|
||||
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
|
||||
; @clobbers R16, R17
|
||||
|
||||
comOnUart1TxCharIsr:
|
||||
; disable further TXC interrupts
|
||||
inr r16, UCSR1B
|
||||
cbr r16, (1<<TXCIE1) ; disable TXC1 interrupt
|
||||
outr UCSR1B, r16
|
||||
brne comOnUart1SendMsg_loop
|
||||
; wait until all data send (i.e. send buffer empty and all bits shifted out)
|
||||
comOnUart1SendMsg_loopComplete:
|
||||
inr r16, UCSR1A
|
||||
sbrs r16, TXC1
|
||||
rjmp comOnUart1SendMsg_loopComplete
|
||||
rcall comOnUart1StopTx ; (R16)
|
||||
ldi r16, UART_HW2_MODE_MSGSENT
|
||||
rcall comOnUart1SetMode ; (R17)
|
||||
rcall comOnUart1SetAttnInput ; release ATTN (none)
|
||||
rcall Utils_WaitFor10MicroSecs ; make sure ATTN is at least high for a short period (R22)
|
||||
sec
|
||||
rjmp comOnUart1SendMsg_end
|
||||
comOnUart1SendMsg_ebusy:
|
||||
ldi r16, NET_IFACE_OFFS_ERR_BUSY_LOW
|
||||
rcall NET_Interface_IncCounter16 ; (R24, R25)
|
||||
clc
|
||||
comOnUart1SendMsg_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif ; AVR_MODULES_UART_HW2_COMONUART1_H
|
||||
|
||||
@@ -17,23 +17,19 @@
|
||||
.equ UART_HW2_MODE_IDLE = 0
|
||||
.equ UART_HW2_MODE_READING = 1
|
||||
.equ UART_HW2_MODE_SKIPPING = 2
|
||||
.equ UART_HW2_MODE_MSGRECEIVED = 3
|
||||
.equ UART_HW2_MODE_WRITING = 4
|
||||
.equ UART_HW2_MODE_WAITBUFFEREMPTY = 5
|
||||
.equ UART_HW2_MODE_MSGSENT = 6
|
||||
.equ UART_HW2_MODE_NUM = 7
|
||||
.equ UART_HW2_MODE_WRITING = 3
|
||||
.equ UART_HW2_MODE_NUM = 4
|
||||
|
||||
|
||||
|
||||
.equ UART_HW2_IFACE_OFFS_BEGIN = NET_IFACE_SIZE
|
||||
.equ UART_HW2_IFACE_OFFS_MODE = UART_HW2_IFACE_OFFS_BEGIN
|
||||
.equ UART_HW2_IFACE_OFFS_MODECOUNTER = UART_HW2_IFACE_OFFS_BEGIN+1
|
||||
.equ UART_HW2_IFACE_OFFS_WRITEBUFNUM = UART_HW2_IFACE_OFFS_BEGIN+2
|
||||
.equ UART_HW2_IFACE_OFFS_BUFPOS_LOW = UART_HW2_IFACE_OFFS_BEGIN+3
|
||||
.equ UART_HW2_IFACE_OFFS_BUFPOS_HIGH = UART_HW2_IFACE_OFFS_BEGIN+4
|
||||
.equ UART_HW2_IFACE_OFFS_BUFUSED = UART_HW2_IFACE_OFFS_BEGIN+5
|
||||
.equ UART_HW2_IFACE_OFFS_BUFLEFT = UART_HW2_IFACE_OFFS_BEGIN+6
|
||||
.equ UART_HW2_IFACE_OFFS_BUFFER = UART_HW2_IFACE_OFFS_BEGIN+7
|
||||
.equ UART_HW2_IFACE_OFFS_BUFPOS_LOW = UART_HW2_IFACE_OFFS_BEGIN+2
|
||||
.equ UART_HW2_IFACE_OFFS_BUFPOS_HIGH = UART_HW2_IFACE_OFFS_BEGIN+3
|
||||
.equ UART_HW2_IFACE_OFFS_BUFUSED = UART_HW2_IFACE_OFFS_BEGIN+4
|
||||
.equ UART_HW2_IFACE_OFFS_BUFLEFT = UART_HW2_IFACE_OFFS_BEGIN+5
|
||||
.equ UART_HW2_IFACE_OFFS_BUFFER = UART_HW2_IFACE_OFFS_BEGIN+6
|
||||
|
||||
.equ UART_HW2_IFACE_SIZE = UART_HW2_IFACE_OFFS_BUFFER+UART_HW2_BUFFER_SIZE
|
||||
|
||||
|
||||
Reference in New Issue
Block a user