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r05, comOnUart0 and comOnUart1 work!

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This commit is contained in:
Martin Preuss
2025-07-06 17:19:59 +02:00
parent 439e787d37
commit 81b008af0c
5 changed files with 302 additions and 566 deletions
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390
avr/modules/uart_hw2/comonuart0.asm
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@@ -33,15 +33,16 @@ ComOnUart0_Init:
ldi yl, LOW(comOnUart0_iface)
ldi yh, HIGH(comOnUart0_iface)
rcall NET_Interface_Init ; (R16, R17, X)
ldi r16, 0xff
std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
ldi r16, UART_HW2_MODE_IDLE
std Y+UART_HW2_IFACE_OFFS_MODE, r16
clr r16
std Y+NET_IFACE_OFFS_IFACENUM, r16
rcall comOnUart0SetAttnInput
sbi COM_IRQ_ADDR_ATTN0, COM_IRQ_BIT_ATTN0 ; enable pin change irq for ATTN line
inr r16, COM_IRQ_ADDR_ATTN0
sbr r16, (1<<COM_IRQ_BIT_ATTN0) ; enable pin change irq for ATTN line
outr COM_IRQ_ADDR_ATTN0, r16
inr r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
sbr r16, (1<<COM_IRQ_GIMSK_ATTN0)
outr GIMSK, r16
@@ -143,70 +144,6 @@ comOnUart0StartReading:
; ---------------------------------------------------------------------------
; @routine comOnUart0StartWriting
;
; @param Y pointer to interface data in SRAM
; @param R16 buffer number
; @return CFLAG set if writing started, cleared otherwise
; @clobbers R16, R17, X, Z (R22, R24, R25)
comOnUart0StartWriting:
push r15
inr r15, SREG
cli
rcall comOnUart0StartWriting_noIrq
brcc comOnUart0StartWriting_clc
outr SREG, r15
pop r15
sec
ret
comOnUart0StartWriting_clc:
outr SREG, r15
pop r15
clc
ret
comOnUart0StartWriting_noIrq:
rcall comOnUart0AcquireAttn ; (R22)
brcc comOnUart0StartWriting_ebusy
; copy buffer
rcall NET_Buffer_Locate ; (R17)
std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
adiw xh:xl, NETMSG_OFFS_MSGLEN+1
ld r17, X
sbiw xh:xl, NETMSG_OFFS_MSGLEN+1
subi r17, -3 ; add dest addr, msglen, crc
; TODO: check size!
std Y+UART_HW2_IFACE_OFFS_BUFUSED, r17
std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
; copy into IFACE buffer
mov zl, yl
mov zh, yh
adiw zh:zl, UART_HW2_IFACE_OFFS_BUFFER ; dest
std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, zl
std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, zh
adiw xh:xl, 1 ; src (skip buffer header)
comOnUart0StartWriting_loop:
ld r16, X+
st Z+, r16
dec r17
brne comOnUart0StartWriting_loop
ldi r16, UART_HW2_MODE_WRITING
rcall comOnUart0SetMode ; (R17)
rcall comOnUart0StartTx ; should be the last call here (R16)
sec
rjmp comOnUart0StartWriting_end
comOnUart0StartWriting_ebusy:
ldi r16, NET_IFACE_OFFS_ERR_BUSY_LOW
rcall NET_Interface_IncCounter16 ; (R24, R25)
clc
comOnUart0StartWriting_end:
ret
; @end
; ---------------------------------------------------------------------------
; @routine ComOnUart0_Run @global
;
@@ -251,10 +188,7 @@ comOnUart0ModeJumpTable:
rjmp comOnUart0RunIdle
rjmp comOnUart0RunReading
rjmp comOnUart0RunSkipping
rjmp comOnUart0RunMsgReceived
rjmp comOnUart0RunWriting
rjmp comOnUart0RunWaitBufferEmpty
rjmp comOnUart0RunMsgSent
; @end
@@ -263,15 +197,48 @@ comOnUart0ModeJumpTable:
; @routine comOnUart0RunIdle
;
; @param Y pointer to interface data in SRAM
; @clobbers R16, R17, R24, R25, X, Z
; @clobbers R16, R17, R22, R24, R25, X
comOnUart0RunIdle:
; look for outbound message
rcall NET_Interface_PeekNextOutgoingMsgNum ; r16=msgNum
brcc comOnUart0RunIdle_end ; no outmsg in queue
rcall comOnUart0StartWriting ; (R16, R17, R22, R24, R25, X, Z)
push r15
inr r15, SREG
cli
; look for outbound message
rcall NET_Interface_PeekNextOutgoingMsgNum ; r16=msgNum
brcs comOnUart0RunIdle_haveMsg
out SREG, r15
pop r15
rjmp comOnUart0RunIdle_end
comOnUart0RunIdle_haveMsg:
mov r24, r16
ldi r16, UART_HW2_MODE_WRITING
rcall comOnUart0SetMode ; (R17)
mov r16, r24
out SREG, r15
pop r15
push r16
rcall NET_Buffer_Locate ; (R17)
adiw xh:xl, 1
rcall comOnUart0SendMsg ; (R16, R17, R22, R24, R25, X)
push r15
inr r15, SREG ; save SREG (no CLI, we want to save CFLAG only)
ldi r16, UART_HW2_MODE_IDLE
rcall comOnUart0SetMode ; (R17)
out SREG, r15 ; restore SREG
pop r15
pop r16
brcc comOnUart0RunIdle_end
rcall NET_Interface_GetNextOutgoingMsgNum ; take current msg off the queue
push r15
inr r15, SREG
cli
rcall NET_Interface_GetNextOutgoingMsgNum ; take current msg off the queue
rcall NET_Buffer_ReleaseByNum ; (R16, X)
out SREG, r15
pop r15
sec
comOnUart0RunIdle_end:
ret
; @end
@@ -308,12 +275,12 @@ comOnUart0RunSkipping_end:
; ---------------------------------------------------------------------------
; @routine comOnUart0RunMsgReceived
; @routine comOnUart0HandleMsgReceived
;
; @param Y pointer to interface data in SRAM
; @clobbers R16, R17, R18, X, Z (R19, R20, R24, R25)
comOnUart0RunMsgReceived:
comOnUart0HandleMsgReceived:
mov xl, yl
mov xh, yh
adiw xh:xl, UART_HW2_IFACE_OFFS_BUFFER
@@ -371,42 +338,6 @@ comOnUart0RunWriting:
; ---------------------------------------------------------------------------
; @routine comOnUart0RunWaitBufferEmpty
;
; @clobbers none
comOnUart0RunWaitBufferEmpty:
; TODO: check for timeout etc.
ret
; @end
; ---------------------------------------------------------------------------
; @routine comOnUart0RunWriting
;
; @param Y pointer to interface data in SRAM
; @clobbers R16 (R17, R22, R24, R25, X)
comOnUart0RunMsgSent:
ldd r16, Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM
rcall NET_Buffer_ReleaseByNum ; (R16, X)
ldi r16, 0xff
std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
ldi r16, NET_IFACE_OFFS_PACKETSOUT_LOW
rcall NET_Interface_IncCounter16 ; (R24, R25)
ldi r16, UART_HW2_MODE_IDLE
rcall comOnUart0SetMode ; (R17)
rcall comOnUart0SetAttnInput ; release ATTN (none)
rcall Utils_WaitFor10MicroSecs ; make sure ATTN is at least high for a short period (R22)
ret
; @end
; ---------------------------------------------------------------------------
; @routine comOnUart0AcquireAttn
;
@@ -467,10 +398,11 @@ comOnUart0StopRx:
comOnUart0StartTx:
inr r16, UCSR0A
cbr r16, (1<<TXC0) ; clear TXCn interrupt
cbr r16, (1<<TXC0) ; clear TXCn interrupt
outr UCSR0A, r16
inr r16, UCSR0B
sbr r16, (1<<UDRIE0) | (1<<TXCIE0) | (1<<TXEN0) ; enable TX UDRE and TXC0 interrupt, enable transceive
cbr r16, (1<<UDRIE0) | (1<<TXCIE0) ; disable TX UDRE and TXC0 interrupt, enable transceive
sbr r16, (1<<TXEN0) ; enable TX UDRE and TXC0 interrupt, enable transceive
outr UCSR0B, r16
ret
; @end
@@ -484,7 +416,7 @@ comOnUart0StartTx:
comOnUart0StopTx:
inr r16, UCSR0B
cbr r16, (1<<UDRIE0) | (1<<TXCIE0) | (1<<TXEN0) ; disable TX UDRE and TXC0 interrupt, enable transceive
cbr r16, (1<<UDRIE0) | (1<<TXCIE0) | (1<<TXEN0) ; disable TX UDRE and TXC0 interrupt, disable transceive
outr UCSR0B, r16
ret
; @end
@@ -506,6 +438,13 @@ comOnUart0SetAttnInput:
.else
cbi COM_ATTN0_OUTPUT, COM_ATTN0_PIN ; disable pullup on ATTN
.endif
push r16
inr r16, COM_IRQ_ADDR_ATTN0
sbr r16, (1<<COM_IRQ_BIT_ATTN0) ; enable pin change irq for ATTN line
outr COM_IRQ_ADDR_ATTN0, r16
pop r16
ret
; @end
@@ -519,8 +458,13 @@ comOnUart0SetAttnInput:
; @clobbers none
comOnUart0SetAttnLow:
sbi COM_ATTN0_DDR, COM_ATTN0_PIN ; set ATTN as output
cbi COM_ATTN0_OUTPUT, COM_ATTN0_PIN ; set ATTN low
push r16
inr r16, COM_IRQ_ADDR_ATTN0
cbr r16, (1<<COM_IRQ_BIT_ATTN0) ; disable pin change irq for ATTN line
outr COM_IRQ_ADDR_ATTN0, r16
pop r16
sbi COM_ATTN0_DDR, COM_ATTN0_PIN ; set ATTN as output
cbi COM_ATTN0_OUTPUT, COM_ATTN0_PIN ; set ATTN low
ret
; @end
@@ -552,21 +496,29 @@ ComOnUart0_RxCharIsr:
push r16
push r17
push r18
push r24
push r25
push xl
push xh
push yl
push yh
ldi yl, LOW(comOnUart0_iface)
ldi yh, HIGH(comOnUart0_iface)
rcall comOnUart0RxCharIsr ; (R16, R17, R18, R24, R25, X)
pop yh
pop yl
pop xh
pop xl
pop r25
pop r24
push r19
push r20
push r24
push r25
push xl
push xh
push yl
push yh
push zl
push zh
ldi yl, LOW(comOnUart0_iface)
ldi yh, HIGH(comOnUart0_iface)
rcall comOnUart0RxCharIsr ; (R16, R17, R18, R19, R20, R24, R25, X, Z)
pop zh
pop zl
pop yh
pop yl
pop xh
pop xl
pop r25
pop r24
pop r20
pop r19
pop r18
pop r17
pop r16
@@ -577,62 +529,6 @@ ComOnUart0_RxCharIsr:
; ---------------------------------------------------------------------------
; @routine ComOnUart0_TxUdreIsr @global @isr
;
; @clobbers none
ComOnUart0_TxUdreIsr:
push r15
in r15, SREG
push r16
push r17
push xl
push xh
push yl
push yh
ldi yl, LOW(comOnUart0_iface)
ldi yh, HIGH(comOnUart0_iface)
rcall comOnUart0TxUdreIsr ; (R16, R17, X)
pop yh
pop yl
pop xh
pop xl
pop r17
pop r16
out SREG, r15
pop r15
reti
; @end
; ---------------------------------------------------------------------------
; @routine ComOnUart0_TxCharIsr @global @isr
;
; @clobbers none
ComOnUart0_TxCharIsr:
push r15
in r15, SREG
push r16
push r17
push yl
push yh
ldi yl, LOW(comOnUart0_iface)
ldi yh, HIGH(comOnUart0_iface)
rcall comOnUart0TxCharIsr ; (R16, R17)
pop yh
pop yl
pop r17
pop r16
out SREG, r15
pop r15
reti
; @end
; ---------------------------------------------------------------------------
; @routine ComOnUart0AttnChangeIsr @global @isr
;
@@ -707,7 +603,7 @@ comOnUart0ActOnAttn_end:
; @routine comOnUart0RxCharIsr @global
;
; @param Y pointer to interface data in SRAM
; @clobbers R16, R17, R18, R24, R25, X
; @clobbers R16, R17, R18, R19, R20, R24, R25, X, Z
comOnUart0RxCharIsr:
; check for errors
@@ -749,8 +645,8 @@ comOnUart0RxCharIsr:
brne comOnUart0RxCharIsr_end ; jmp if still bytes left to receive
comOnUart0RxCharIsr_complete:
rcall comOnUart0StopRx
ldi r16, UART_HW2_MODE_MSGRECEIVED
rcall comOnUart0SetMode ; (R17)
rcall comOnUart0HandleMsgReceived ; (R16, R17, R18, R19, R20, R24, R25, X, Z)
rjmp comOnUart0RxCharIsr_end
comOnUart0RxCharIsr_hwerr:
ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
@@ -772,76 +668,54 @@ comOnUart0RxCharIsr_end:
; ---------------------------------------------------------------------------
; @routine comOnUart0TxUdreIsr @global
; @routine comOnUart0SendMsg
;
; Handler for UDRE1 interrupt called when TX data register is empty.
;
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
; @clobbers R16, R17, X
; @param Y pointer to interface data in SRAM
; @param X pointer to buffer to send
; @return CFLAG set if writing started, cleared otherwise
; @clobbers R16, R17, X (R22, R24, R25)
comOnUart0TxUdreIsr:
inr r16, UCSR0A
sbrs r16, UDRE0
rjmp comOnUart0TxUdreIsr_disable_irq ; not ready
; check bytes left
ldd r17, Y+UART_HW2_IFACE_OFFS_BUFLEFT
tst r17
breq comOnUart0TxUdreIsr_finished
; read byte
ldd xl, Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW
ldd xh, Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH
ld r16, X+
std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, xl
std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
; send byte
outr UDR0, r16 ; send byte
; decreased counter
dec r17
std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
brne comOnUart0TxUdreIsr_end ; still bytes left to send, jump
comOnUart0TxUdreIsr_finished:
ldi r16, UART_HW2_MODE_WAITBUFFEREMPTY
rcall comOnUart0SetMode ; (R17)
comOnUart0TxUdreIsr_disable_irq:
; disable further DRE interrupts
inr r16, UCSR0B
cbr r16, (1<<UDRIE0) ; disable TX data register empty interrupt
outr UCSR0B, r16
comOnUart0TxUdreIsr_end:
comOnUart0SendMsg:
rcall comOnUart0AcquireAttn ; (R22)
brcc comOnUart0SendMsg_ebusy
adiw xh:xl, NETMSG_OFFS_MSGLEN
ld r17, X
sbiw xh:xl, NETMSG_OFFS_MSGLEN
subi r17, -3 ; add dest addr, msglen, crc
rcall comOnUart0StartTx ; (R16)
; TODO: check size!
; r17=number of bytes to write, X=buffer
comOnUart0SendMsg_loop:
; wait until transceiver ready
inr r16, UCSR0A
sbrs r16, UDRE0
rjmp comOnUart0SendMsg_loop
; clear TXC flag by sending a 1
sbr r16, (1<<TXC0)
outr UCSR0A, r16
; write byte to uart data register
ld r16, X+
outr UDR0, r16
dec r17
brne comOnUart0SendMsg_loop
; wait until all data send (i.e. send buffer empty and all bits shifted out)
comOnUart0SendMsg_loopComplete:
inr r16, UCSR0A
sbrs r16, TXC0
rjmp comOnUart0SendMsg_loopComplete
rcall comOnUart0StopTx ; (R16)
rcall comOnUart0SetAttnInput ; release ATTN (none)
rcall Utils_WaitFor10MicroSecs ; make sure ATTN is at least high for a short period (R22)
sec
rjmp comOnUart0SendMsg_end
comOnUart0SendMsg_ebusy:
ldi r16, NET_IFACE_OFFS_ERR_BUSY_LOW
rcall NET_Interface_IncCounter16 ; (R24, R25)
clc
comOnUart0SendMsg_end:
ret
; @end
; ---------------------------------------------------------------------------
; @routine comOnUart0TxCharIsr @global
;
; Handler for TXC0 interrupt called when the last byte has been completely sent and
; the data register is empty.
;
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
; @clobbers R16, R17
comOnUart0TxCharIsr:
; disable further TXC interrupts
inr r16, UCSR0B
cbr r16, (1<<TXCIE0) ; disable TXC1 interrupt
outr UCSR0B, r16
rcall comOnUart0StopTx ; (R16)
ldi r16, UART_HW2_MODE_MSGSENT
rcall comOnUart0SetMode ; (R17)
ret
; @end
#endif ; AVR_MODULES_UART_HW2_COMONUART0_H