added device n30.

2026-03-01 01:09:04 +01:00
parent bdd2d3bdc6
commit 69420d9c7d
11 changed files with 811 additions and 0 deletions
--- a/avr/devices/n30/boot/boot.asm
+++ b/avr/devices/n30/boot/boot.asm
@@ -0,0 +1,130 @@
+; ***************************************************************************
+; Source file for base system node on AtTiny 84
+;
+; This is for the maintenance system (i.e. the flash loader).
+;
+; All definitions and changes should go into this file.
+;
+;
+; ***************************************************************************
+
+.equ clock=1000000 ; Define the clock frequency
+
+.nolist
+.include "include/tn84def.inc" ; Define device ATtiny84
+.list
+
+.include "version.asm"
+.include "../defs.asm"
+.include "devices/all/defs.asm"
+
+.include "common/calls.asm"
+.include "common/utils_io.asm"
+.include "common/utils_wait.asm"
+
+
+
+; ***************************************************************************
+; defines
+
+; ---------------------------------------------------------------------------
+; LED
+
+.equ LED_DDR             = DDRA
+.equ LED_PORT            = PORTA
+.equ LED_PIN             = PINA
+.equ LED_PINNUM          = PORTA3
+
+
+
+; ***************************************************************************
+; code segment
+
+.cseg
+.org 0x0000
+
+
+
+; ---------------------------------------------------------------------------
+; Reset and interrupt vectors
+
+  rjmp main                   ;  1: Reset vector
+  reti                        ;  2: EXT_INT0
+  reti                        ;  3: PCI0
+  reti                        ;  4: PCI1
+  reti                        ;  5: WDT
+  reti                        ;  6: TIM1_CAPT
+  reti                        ;  7: TIM1_COMPA
+  reti                        ;  8: TIM1_COMPB
+  reti                        ;  9: TIM1_OVF
+  reti                        ; 10: TIM0_COMPA
+  reti                        ; 11: TIM0_COMPB
+  reti                        ; 12: TIM0_OVF
+  reti                        ; 13: ANA_COMP
+  reti                        ; 14: ADC
+  reti                        ; 15: EE_RDY
+  reti                        ; 16: USI_STR
+  reti                        ; 17: USI_OVF
+
+devInfoBlock:        ; 12 bytes
+devInfoManufacturer: .db 'A', 'Q', 'U', 'A'
+devInfoId:           .db DEVICEINFO_ID, 0
+devInfoVersion:      .db DEVICEINFO_VERSION, DEVICEINFO_REVISION             ; version, revision
+firmwareVersion:     .db FIRMWARE_VARIANT_BOOT, FIRMWARE_VERSION_MAJOR
+                     .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL
+
+firmwareStart:
+  rjmp main ; will be overwritten when flashing
+
+
+
+; ***************************************************************************
+; main code
+
+
+.org BOOTLOADER_ADDR
+
+
+main:
+  rjmp bootLoader ; this routine is in modules/bootloader/main.asm
+
+
+
+; ***************************************************************************
+; includes
+
+.include "common/utils_wait_fixed.asm"
+.include "common/utils_copy_from_flash.asm"
+.include "common/utils_copy_sdram.asm"
+
+.include "modules/flash/defs.asm"
+.include "modules/flash/eeprom.asm"
+.include "modules/flash/io.asm"
+.include "modules/flash/io_com2w.asm"
+.include "modules/flash/flashxp.asm"
+.include "modules/flash/flash1p.asm"
+.include "modules/flash/flashprocess.asm"
+.include "modules/flash/wait.asm"
+.include "modules/bootloader/main.asm"
+.include "modules/network/msg/defs.asm"
+.include "modules/network/msg/crc.asm"
+
+
+
+systemSetSpeed:
+.if clock == 8000000
+  ldi r16, (1<<CLKPCE)
+  ldi r17, 0
+  out CLKPR, r16
+  out CLKPR, r17
+.endif
+
+.if clock == 1000000
+  ldi r16, (1<<CLKPCE)
+  ldi r17, (1<<CLKPS1) | (1<<CLKPS0)
+  out CLKPR, r16
+  out CLKPR, r17
+.endif
+  ret
+
+