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avr/devices/all: started integrating code from t03.

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This commit is contained in:
Martin Preuss
2025-05-08 17:14:33 +02:00
parent cc7ef0cf30
commit 64e2cf5d25
19 changed files with 1544 additions and 100 deletions
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25
avr/devices/all/apps.asm
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@@ -68,4 +68,29 @@ runApps:
; ---------------------------------------------------------------------------
; @routine mainAppsOnPacketReceived
;
; Let all apps handle received message.
mainAppsOnPacketReceived:
#ifdef APPS_NETWORK
; handle messages
ldi yl, LOW(netInterfaceData)
ldi yh, HIGH(netInterfaceData)
rcall AppNetwork_HandleMsg
#endif
#ifdef APPS_MA_LIGHT
rcall AppMotionLight_OnPacketReceived
#endif
; add more here
ret
; @end

22
avr/devices/all/hw_tn84.asm
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@@ -63,3 +63,25 @@ systemSetSpeed:
; @end ; @end
; ---------------------------------------------------------------------------
; @routine systemSleep
;
systemSleep:
; only modify SE, SM1 and SM0
cli
in r16, MCUCR
ldi r17, (1<<SE) | (1<<SM1) | (1<<SM0)
neg r17
and r16, r17
ori r16, (1<<SE) ; sleep mode "idle", enable
out MCUCR, r16
sei ; make sure interrupts really are enabled
sleep ; sleep, wait for interrupt
ret
; @end

79
avr/devices/all/hw_tn841.asm Normal file
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@@ -0,0 +1,79 @@
; ***************************************************************************
; copyright : (C) 2025 by Martin Preuss
; email : martin@libchipcard.de
;
; ***************************************************************************
; * This file is part of the project "AqHome". *
; * Please see toplevel file COPYING of that project for license details. *
; ***************************************************************************
; Hardware routine for AtTiny 84 devices
.cseg
; ---------------------------------------------------------------------------
; @routine systemInitHardware
;
systemInitHardware:
; set all ports as inputs and enable internal pull-up resistors
ldi r16, 0xff
clr r17
out DDRA, r17 ; all input
sts PUEA, r16 ; enable pull-up on all
out DDRB, r17 ; all input
sts PUEB, r16 ; enable pull-up on all
ret
; @end
; ---------------------------------------------------------------------------
; @routine systemSetSpeed
;
systemSetSpeed:
.if clock == 1000000
ldi r17, 0xd8
ldi r16, (1<<CLKPS1) | (1<<CLKPS0) ; SUT=0, CLKPS=0011b
sts CCP, r17
sts CLKPR, r16
.endif
.if clock == 8000000
ldi r17, 0xd8
clr r16 ; SUT=0, CLKPS=0
sts CCP, r17
sts CLKPR, r16
.endif
ret
; @end
; ---------------------------------------------------------------------------
; @routine systemSleep
;
systemSleep:
; only modify SE, SM1 and SM0
cli
in r16, MCUCR
ldi r17, (1<<SE) | (1<<SM1) | (1<<SM0)
neg r17
and r16, r17
ori r16, (1<<SE) ; sleep mode "idle", enable
out MCUCR, r16
sei ; make sure interrupts really are enabled
sleep ; sleep, wait for interrupt
ret
; @end

22
avr/devices/all/hw_tn85.asm
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@@ -63,3 +63,25 @@ systemSetSpeed:
; @end ; @end
; ---------------------------------------------------------------------------
; @routine systemSleep
;
systemSleep:
; only modify SE, SM1 and SM0
cli
in r16, MCUCR
ldi r17, (1<<SE) | (1<<SM1) | (1<<SM0)
neg r17
and r16, r17
ori r16, (1<<SE) ; sleep mode "idle", enable
out MCUCR, r16
sei ; make sure interrupts really are enabled
sleep ; sleep, wait for interrupt
ret
; @end

18
avr/devices/all/includes.asm
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@@ -47,6 +47,24 @@
.include "modules/uart_bitbang2/lowlevel.asm" .include "modules/uart_bitbang2/lowlevel.asm"
#endif #endif
#ifdef MODULES_COMONUART0
.include "modules/uart_hw/defs.asm"
.include "modules/uart_hw/lowlevel.asm"
.include "modules/uart_hw/m_lowlevel_uart.asm"
.include "modules/uart_hw/comonuart0.asm"
#endif
#ifdef MODULES_TTYONUART1
#ifndef MODULES_COMONUART0
.include "modules/uart_hw/defs.asm"
.include "modules/uart_hw/lowlevel.asm"
.include "modules/uart_hw/m_lowlevel_uart.asm"
#endif
.include "modules/uart_hw/ttyonuart1.asm"
#endif
#ifdef MODULES_CLOCK #ifdef MODULES_CLOCK
.include "modules/clock/main.asm" .include "modules/clock/main.asm"
#endif #endif

47
avr/devices/all/main.asm
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@@ -53,22 +53,16 @@ main:
#endif #endif
main_loop: main_loop:
; only modify SE, SM1 and SM0 rcall systemSleep ; system-dependant
cli
in r16, MCUCR
ldi r17, (1<<SE) | (1<<SM1) | (1<<SM0)
neg r17
and r16, r17
ori r16, (1<<SE) ; sleep mode "idle", enable
out MCUCR, r16
sei ; make sure interrupts really are enabled
sleep ; sleep, wait for interrupt
rcall runModules rcall runModules
rcall runApps rcall runApps
rcall onEveryLoop ; call into main app
#ifdef MODULES_NETWORK #ifdef MODULES_NETWORK
rcall handleMessages #ifndef MAIN_WITHOUT_MSG_HANDLING
rcall mainHandleMessages
#endif
#endif #endif
rjmp main_loop rjmp main_loop
@@ -100,6 +94,14 @@ onSystemTimerTick:
rcall UART_BitBang_Every100ms rcall UART_BitBang_Every100ms
#endif #endif
#ifdef MODULES_TTYONUART1
rcall TtyOnUart1_Periodically
#endif
#ifdef MODULES_COMONUART0
rcall ComOnUart0_Periodically
#endif
#ifdef MODULES_TCRT1000 #ifdef MODULES_TCRT1000
rcall TCRT1K_Every100ms rcall TCRT1K_Every100ms
#endif #endif
@@ -163,6 +165,27 @@ sysOnEveryDay:
#ifdef MODULES_NETWORK
; ---------------------------------------------------------------------------
; @routine mainHandleMessages
mainHandleMessages:
rcall NET_GetNextIncomingMsgNum ; R16=msg num
brcc mainHandleMessages_end
rcall NET_Buffer_Locate ; X=buffer addr (R17)
adiw xh:xl, 1
push r16
rcall onMessageReceived
rcall mainModulesOnPacketReceived
rcall mainAppsOnPacketReceived
pop r16
rcall NET_Buffer_ReleaseByNum
sec
mainHandleMessages_end:
ret
; @end
#endif

48
avr/devices/all/modules.asm
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@@ -57,6 +57,14 @@ initModules:
rcall UART_BitBang_Init rcall UART_BitBang_Init
#endif #endif
#ifdef MODULES_TTYONUART1
rcall TtyOnUart1_Init
#endif
#ifdef MODULES_COMONUART0
rcall ComOnUart0_Init
#endif
#ifdef MODULES_MOTION #ifdef MODULES_MOTION
rcall Motion_Init rcall Motion_Init
#endif #endif
@@ -111,6 +119,7 @@ initModules:
rcall CCS811_Init rcall CCS811_Init
#endif #endif
; done ; done
ret ret
; @end ; @end
@@ -142,7 +151,14 @@ runModules_Com:
dec r16 dec r16
brne runModules_Com brne runModules_Com
runModules_ComEnd: runModules_ComEnd:
#endif
#ifdef MODULES_TTYONUART1
rcall TtyOnUart1_Run
#endif
#ifdef MODULES_COMONUART0
rcall ComOnUart0_Run
#endif #endif
#ifdef MODULES_STATS #ifdef MODULES_STATS
@@ -172,44 +188,16 @@ runModules_ComEnd:
#ifdef MODULES_NETWORK mainModulesOnPacketReceived:
; ---------------------------------------------------------------------------
; @routine handleMessages
handleMessages:
rcall NET_GetNextIncomingMsgNum ; R16=msg num
brcc handleMessages_end
rcall NET_Buffer_Locate ; X=buffer addr (R17)
adiw xh:xl, 1
push r16
rcall onMessageReceived
#ifdef MODULES_SK6812 #ifdef MODULES_SK6812
rcall SK6812_OnPacketReceived rcall SK6812_OnPacketReceived
#endif #endif
#ifdef APPS_NETWORK ; add more here
; handle messages
ldi yl, LOW(netInterfaceData)
ldi yh, HIGH(netInterfaceData)
rcall AppNetwork_HandleMsg
#endif
#ifdef APPS_MA_LIGHT
rcall AppMotionLight_OnPacketReceived
#endif
; add more here
pop r16
rcall NET_Buffer_ReleaseByNum
sec
handleMessages_end:
ret ret
; @end ; @end
#endif

11
avr/devices/n21/main/main.asm
View File

@@ -182,6 +182,17 @@ onEveryDay:
; ---------------------------------------------------------------------------
; @routine onEveryLoop
;
; Called on every loop (i.e. after awakening from sleep).
;
onEveryLoop:
ret
; @end
; *************************************************************************** ; ***************************************************************************

11
avr/devices/n22/main/main.asm
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@@ -165,6 +165,17 @@ onEveryDay:
; ---------------------------------------------------------------------------
; @routine onEveryLoop
;
; Called on every loop (i.e. after awakening from sleep).
;
onEveryLoop:
ret
; @end
; *************************************************************************** ; ***************************************************************************

14
avr/devices/n23/main/main.asm
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@@ -143,6 +143,8 @@ devInfoVersion: .db DEVICEINFO_VERSION, DEVICEINFO_REVISION ; v
firmwareVersion: .db FIRMWARE_VARIANT_TEMP_WINDOW, FIRMWARE_VERSION_MAJOR firmwareVersion: .db FIRMWARE_VARIANT_TEMP_WINDOW, FIRMWARE_VERSION_MAJOR
.db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL
; --------------------------------------------------------------------------- ; ---------------------------------------------------------------------------
; @routine firmwareStart @global ; @routine firmwareStart @global
@@ -188,6 +190,18 @@ onEveryDay:
; ---------------------------------------------------------------------------
; @routine onEveryLoop
;
; Called on every loop (i.e. after awakening from sleep).
;
onEveryLoop:
ret
; @end
; *************************************************************************** ; ***************************************************************************
; includes ; includes

59
avr/devices/t03/0BUILD
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@@ -2,67 +2,14 @@
<gwbuild> <gwbuild>
<target type="AvrHexFile" name="t03_firmware" >
<includes type="avrasm" >
-I $(builddir)
-I $(srcdir)
-I $(topsrcdir)/avr
-I $(topbuilddir)/avr
</includes>
<sources type="avrasm" >
main.asm
</sources>
</target>
<target type="AvrHexFile" name="t03_boot" >
<includes type="avrasm" >
-I $(builddir)
-I $(srcdir)
-I $(topsrcdir)/avr
-I $(topbuilddir)/avr
</includes>
<sources type="avrasm" >
boot.asm
</sources>
</target>
<target type="AvrHexFile" name="t03_debugboot" >
<includes type="avrasm" >
-I $(builddir)
-I $(srcdir)
-I $(topsrcdir)/avr
-I $(topbuilddir)/avr
</includes>
<sources type="avrasm" >
debugboot.asm
</sources>
</target>
<subdirs> <subdirs>
boot
main
</subdirs> </subdirs>
<extradist> <extradist>
defs.asm defs.asm
README
</extradist> </extradist>

0
avr/devices/t03/README Normal file
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32
avr/devices/t03/boot/0BUILD Normal file
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@@ -0,0 +1,32 @@
<?xml?>
<gwbuild>
<target type="AvrHexFile" name="t03_boot" >
<includes type="avrasm" >
-I $(builddir)
-I $(srcdir)
-I $(topsrcdir)/avr
-I $(topbuilddir)/avr
</includes>
<sources type="avrasm" >
boot.asm
</sources>
</target>
<subdirs>
</subdirs>
<extradist>
</extradist>
</gwbuild>

161
avr/devices/t03/boot/boot.asm Normal file
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@@ -0,0 +1,161 @@
; ***************************************************************************
; Source file for base system node on AtTiny 84
;
; This is for the maintenance system (i.e. the flash loader).
;
; All definitions and changes should go into this file.
; ***************************************************************************
;.equ clock=1000000 ; Define the clock frequency
.equ clock=8000000 ; Define the clock frequency
.nolist
.include "include/tn841def.inc" ; Define device ATtiny841
.list
.include "../defs.asm"
.include "defs_all.asm"
; ***************************************************************************
; defines
; ---------------------------------------------------------------------------
; generic
.include "common/utils_wait.asm"
.include "modules/com2/defs.asm"
.include "modules/comproto/defs.asm"
; ---------------------------------------------------------------------------
; firmware settings
.equ FIRMWARE_VERSION_MAJOR = 0
.equ FIRMWARE_VERSION_MINOR = 0
.equ FIRMWARE_VERSION_PATCHLEVEL = 1
;#define COM_ACCEPT_ALL_DEST 1
; ---------------------------------------------------------------------------
; LED
.equ LED_DDR = DDRB
.equ LED_PORT = PORTB
.equ LED_PIN = PINB
.equ LED_PINNUM = PORTB2
; ***************************************************************************
; code segment
.cseg
.org 0x0000
; ---------------------------------------------------------------------------
; Reset and interrupt vectors
rjmp main ; 1: RESET Reset vector use this for flashed system
reti ; 2: INT0 External Interrupt Request 0
reti ; 3: PCINT0 Pin Change Interrupt 0
reti ; 4: PCINT1 Pin Change Interrupt 1
reti ; 5: WDT Watchdog Time-out
reti ; 6: TIM1_CAPT Timer/Counter1 Capture Event
reti ; 7: TIM1_COMPA (OC1A) Timer/Counter1 Compare Match A
reti ; 8: TIM1_COMPB (OC1B) Timer/Counter1 Compare Match B
reti ; 9: TIM1_OVF (OVF1) Timer/Counter1 Overflow
reti ; 10: TIM0_COMPA (OC0A) Timer/Counter0 Compare Match A
reti ; 11: TIM0_COMPB (OC0B) Timer/Counter0 Compare Match B
reti ; 12: TIM0_OVF (OVF0) Timer/Counter0 Overflow
reti ; 13: ANA_COMP0 Analog Comparator 0
reti ; 14: ADC_READY ADC Conversion Complete
reti ; 15: EE_RDY (ERDY) EEPROM Ready
reti ; 16: ANA_COMP1 Analog Comparator 1
reti ; 17: TIM2_CAPT Timer/Counter2 Capture Event
reti ; 18: TIM2_COMPA (OC2A) Timer/Counter2 Compare Match A
reti ; 19: TIM2_COMPB (OC2B) Timer/Counter2 Compare Match B
reti ; 20: TIM2_OVF (OVF2) Timer/Counter2 Overflow
reti ; 21: SPI SPI Serial Transfer Complete
reti ; 22: USART0_RXS USART0 Rx Start
reti ; 23: USART0_RXC USART0 Rx Complete
reti ; 24: USART0_DRE USART0 Data Register Empty
reti ; 25: USART0_TXC USART0 Tx Complete
reti ; 26: USART1_RXS USART1 Rx Start
reti ; 27: USART1_RXC USART1 Rx Complete
reti ; 28: USART1_DRE USART1 Data Register Empty
reti ; 29: USART1_TXC USART1 Tx Complete
reti ; 30: TWI Two-Wire-Interface
reti ; 31: RESERVED reserved
devInfoBlock: ; 12 bytes
devInfoManufacturer: .db 'A', 'Q', 'U', 'A'
devInfoId: .db DEVICEINFO_ID, 0
devInfoVersion: .db DEVICEINFO_VERSION, DEVICEINFO_REVISION ; version, revision
firmwareVersion: .db FIRMWARE_VARIANT_BOOT, FIRMWARE_VERSION_MAJOR
.db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL
firmwareStart:
rjmp main ; will be overwritten when flashing
; ***************************************************************************
; main code
.org BOOTLOADER_ADDR
main:
rjmp bootLoader ; this routine is in modules/bootloader/main.asm
; ***************************************************************************
; includes
.include "common/utils_wait_fixed.asm"
.include "common/utils_copy_from_flash.asm"
.include "common/utils_copy_sdram.asm"
.include "modules/flash/defs.asm"
.include "modules/flash/eeprom.asm"
.include "modules/flash/io.asm"
.include "modules/flash/io_uart1.asm"
.include "modules/flash/flashxp.asm"
.include "modules/flash/flash4p.asm"
.include "modules/flash/flashprocess.asm"
.include "modules/flash/wait.asm"
.include "modules/bootloader/main.asm"
.include "modules/network/msg/defs.asm"
.include "modules/network/msg/crc.asm"
systemSetSpeed:
.if clock == 1000000
ldi r17, 0xd8
ldi r16, (1<<CLKPS1) | (1<<CLKPS0) ; SUT=0, CLKPS=0011b
sts CCP, r17
sts CLKPR, r16
.endif
.if clock == 8000000
ldi r17, 0xd8
clr r16 ; SUT=0, CLKPS=0
sts CCP, r17
sts CLKPR, r16
.endif
ret

34
avr/devices/t03/main/0BUILD Normal file
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@@ -0,0 +1,34 @@
<?xml?>
<gwbuild>
<target type="AvrHexFile" name="t03_firmware" >
<includes type="avrasm" >
-I $(builddir)
-I $(srcdir)
-I $(topsrcdir)/avr
-I $(topbuilddir)/avr
</includes>
<sources type="avrasm" >
main2.asm
</sources>
</target>
<subdirs>
</subdirs>
<extradist>
data.asm
</extradist>
</gwbuild>

17
avr/devices/t03/main/data.asm Normal file
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@@ -0,0 +1,17 @@
; ***************************************************************************
; copyright : (C) 2025 by Martin Preuss
; email : martin@libchipcard.de
;
; ***************************************************************************
; * This file is part of the project "AqHome". *
; * Please see toplevel file COPYING of that project for license details. *
; ***************************************************************************
.dseg
programRamBegin:
flashUid: .byte 4
programRamEnd:

749
avr/devices/t03/main/main.asm Normal file
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@@ -0,0 +1,749 @@
; ***************************************************************************
; copyright : (C) 2024 by Martin Preuss
; email : martin@libchipcard.de
;
; ***************************************************************************
; * This file is part of the project "AqHome". *
; * Please see toplevel file COPYING of that project for license details. *
; ***************************************************************************
; ***************************************************************************
; Source file for temperature sensor node on AtTiny 84
;
; This is for the full system (i.e. not the boot loader).
;
; All definitions and changes should go into this file.
;
;
; ***************************************************************************
;.equ clock=1000000 ; Define the clock frequency
.equ clock=8000000 ; Define the clock frequency
;.equ SEND_DEVICE_EVERY = 3000
.equ SEND_DEVICE_EVERY = 3000 ; every 5mins
.equ SEND_STATS_EVERY = 3100 ; about every 5mins
;.equ SEND_STATS_EVERY = 300 ; every 30s
;.equ SEND_DEBUG_EVERY = 110
;#define WITH_SEND_DEBUG
.nolist
.include "include/tn841def.inc" ; Define device ATtiny841
.list
.include "../defs.asm"
.include "defs_all.asm"
; ***************************************************************************
; defines
; ---------------------------------------------------------------------------
; generic
.include "common/utils_wait.asm"
; ---------------------------------------------------------------------------
; firmware settings including list of modules used
.equ FIRMWARE_VERSION_MAJOR = 0
.equ FIRMWARE_VERSION_MINOR = 0
.equ FIRMWARE_VERSION_PATCHLEVEL = 1
;#define MODULES_TIMER
;#define MODULES_COM
;#define MODULES_COM_WITH_ADDR_PROTO
;#define MODULES_LED
#define MODULES_LED_SIMPLE
;#define MODULES_TWI_MASTER
;#define MODULES_LCD
;#define LCD_MINIMAL_FONT
;#define MODULES_SI7021
;#define MODULES_STATS
;#define MODULES_CNY70
;#define MODULES_REED
;#define MODULES_OWI_MASTER
;#define MODULES_DS18B20
;#define MODULES_MOTION
.equ NET_BUFFERS_NUM = 8
.equ NET_BUFFERS_SIZE = 32
.equ UART_HW_MSGNUMINBUF_SIZE = 8
.equ UART_HW_MSGNUMOUTBUF_SIZE = 8
; ***************************************************************************
; code segment
.cseg
.org 000000
; ---------------------------------------------------------------------------
; Reset and interrupt vectors
rjmp BOOTLOADER_ADDR ; 1: RESET Reset vector use this for flashed system
reti ; 2: INT0 External Interrupt Request 0
rjmp ComOnUart0_AttnChangeIsr ; 3: PCINT0 Pin Change Interrupt 0
reti ; 4: PCINT1 Pin Change Interrupt 1
reti ; 5: WDT Watchdog Time-out
reti ; 6: TIM1_CAPT Timer/Counter1 Capture Event
reti ; 7: TIM1_COMPA (OC1A) Timer/Counter1 Compare Match A
reti ; 8: TIM1_COMPB (OC1B) Timer/Counter1 Compare Match B
reti ; 9: TIM1_OVF (OVF1) Timer/Counter1 Overflow
rjmp baseTimerIrqOC0A ; 10: TIM0_COMPA (OC0A) Timer/Counter0 Compare Match A
reti ; 11: TIM0_COMPB (OC0B) Timer/Counter0 Compare Match B
reti ; 12: TIM0_OVF (OVF0) Timer/Counter0 Overflow
reti ; 13: ANA_COMP0 Analog Comparator 0
reti ; 14: ADC_READY ADC Conversion Complete
reti ; 15: EE_RDY (ERDY) EEPROM Ready
reti ; 16: ANA_COMP1 Analog Comparator 1
reti ; 17: TIM2_CAPT Timer/Counter2 Capture Event
reti ; 18: TIM2_COMPA (OC2A) Timer/Counter2 Compare Match A
reti ; 19: TIM2_COMPB (OC2B) Timer/Counter2 Compare Match B
reti ; 20: TIM2_OVF (OVF2) Timer/Counter2 Overflow
reti ; 21: SPI SPI Serial Transfer Complete
reti ; 22: USART0_RXS USART0 Rx Start
rjmp ComOnUart0_RxCharIsr ; 23: USART0_RXC USART0 Rx Complete
rjmp ComOnUart0_TxUdreIsr ; 24: USART0_DRE USART0 Data Register Empty
rjmp ComOnUart0_TxCharIsr ; 25: USART0_TXC USART0 Tx Complete
reti ; 26: USART1_RXS USART1 Rx Start
rjmp TtyOnUart1_RxCharIsr ; 27: USART1_RXC USART1 Rx Complete
rjmp TtyOnUart1_TxUdreIsr ; 28: USART1_DRE USART1 Data Register Empty
rjmp TtyOnUart1_TxCharIsr ; 29: USART1_TXC USART1 Tx Complete
reti ; 30: TWI Two-Wire-Interface
reti ; 31: RESERVED reserved
devInfoBlock: ; 12 bytes
devInfoManufacturer: .db 'A', 'Q', 'U', 'A'
devInfoId: .db DEVICEINFO_ID, 0
devInfoVersion: .db DEVICEINFO_VERSION, DEVICEINFO_REVISION ; version, revision
firmwareVersion: .db FIRMWARE_VARIANT_TEMP_WINDOW, FIRMWARE_VERSION_MAJOR
.db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL
firmwareStart:
cli
; setup stack
.ifdef SPH ; if SPH is defined
ldi r16, High(RAMEND)
out SPH, r16 ; init MSB stack pointer
.endif
ldi r16, Low(RAMEND)
out SPL, r16 ; init LSB stack pointer
rcall systemSetSpeed
rcall initHardware
; rcall watchdogOff ; turn off watchdog timer (sometimes it stays on after reboot)
rcall Utils_Init
rcall Utils_SetupUid
rcall initModules
sbi LED_SIMPLE_DDR, LED_SIMPLE_PINNUM ; out
sbi LED_SIMPLE_PORT, LED_SIMPLE_PINNUM ; off
sei
main_loop:
rcall BaseTimer_Run
rcall TtyOnUart1_Run
rcall ComOnUart0_Run
; check incoming msg
rcall checkRecvdMsg
; rcall freeRecvdMsg
; only modify SE, SM1 and SM0
cli
in r16, MCUCR
ldi r17, (1<<SE) | (1<<SM1) | (1<<SM0)
neg r17
and r16, r17
ori r16, (1<<SE) ; sleep mode "idle", enable
out MCUCR, r16
sei ; make sure interrupts really are enabled
sleep ; sleep, wait for interrupt
rjmp main_loop
systemSetSpeed:
.if clock == 1000000
ldi r17, 0xd8
ldi r16, (1<<CLKPS1) | (1<<CLKPS0) ; SUT=0, CLKPS=0011b
sts CCP, r17
sts CLKPR, r16
.endif
.if clock == 8000000
ldi r17, 0xd8
clr r16 ; SUT=0, CLKPS=0
sts CCP, r17
sts CLKPR, r16
.endif
ret
; ---------------------------------------------------------------------------
; Called every 100ms. Add your routine calls here. No arguments, no results.
onSystemTimerTick:
#ifdef MODULES_LED_SIMPLE
rcall LedSimple_Every100ms
#endif
rcall TtyOnUart1_Periodically
rcall ComOnUart0_Periodically
#ifdef WITH_SEND_DEBUG
rcall sendDebug
#endif
; rcall maybeSendDeviceMsg
rcall maybeSendTStatsMsg
rcall maybeSendRStatsMsg
rcall maybeSendMStatsMsg
ret
initHardware:
; set all ports as inputs and enable internal pull-up resistors
ldi r16, 0xff
clr r17
.ifdef PORTA
out DDRA, r17 ; all input
sts PUEA, r16 ; enable pull-up on all
.endif
.ifdef PORTB
out DDRB, r17 ; all input
sts PUEB, r16 ; enable pull-up on all
.endif
.ifdef PORTC
out DDRC, r17 ; all input
sts PUEC, r16 ; enable pull-up on all
.endif
ret
; @end
initModules:
rcall BaseTimer_Init
rcall LedSimple_Init
rcall NET_Init
rcall TtyOnUart1_Init
ldi r16, 0xfe
sts ttyOnUart1_iface+NET_IFACE_OFFS_ADDRESS, r16
rcall ComOnUart0_Init
ldi r16, LOW(SEND_DEVICE_EVERY)
sts deviceCounter, r16
ldi r16, HIGH(SEND_DEVICE_EVERY)
sts deviceCounter+1, r16
ldi r16, LOW(SEND_STATS_EVERY)
sts sendTStatsCounter, r16
ldi r16, HIGH(SEND_STATS_EVERY)
sts sendTStatsCounter+1, r16
ldi r16, LOW(SEND_STATS_EVERY+10)
sts sendRStatsCounter, r16
ldi r16, HIGH(SEND_STATS_EVERY+10)
sts sendRStatsCounter+1, r16
ldi r16, LOW(SEND_STATS_EVERY+20)
sts sendMStatsCounter, r16
ldi r16, HIGH(SEND_STATS_EVERY+20)
sts sendMStatsCounter+1, r16
#ifdef WITH_SEND_DEBUG
ldi r16, LOW(SEND_DEBUG_EVERY)
sts debugMsgCounter, r16
ldi r16, HIGH(SEND_DEBUG_EVERY)
sts debugMsgCounter+1, r16
#endif
ret
; @end
; ***************************************************************************
; includes
.include "common/utils.asm"
.include "common/utils_wait.asm"
.include "common/utils_wait_fixed.asm"
.include "common/utils_copy_from_flash.asm"
.include "common/utils_copy_sdram.asm"
.include "common/m_ringbuffer_y.asm"
.include "common/ringbuffer_y.asm"
.include "common/m_fixedbuffers.asm"
.include "modules/basetimer/main.asm"
.include "modules/led_simple/main.asm"
.include "modules/network/defs.asm"
.include "modules/network/buffer.asm"
.include "modules/network/data.asm"
.include "modules/network/main.asm"
.include "modules/network/iface.asm"
.include "modules/network/msg/defs.asm"
.include "modules/network/msg/common.asm"
.include "modules/network/msg/crc.asm"
.include "modules/network/msg/device-w.asm"
.include "modules/network/msg/sendstats-w.asm"
.include "modules/network/msg/recvstats-w.asm"
.include "modules/network/msg/memstats-w.asm"
.include "modules/network/msg/debug-w.asm"
.include "modules/uart_hw/defs.asm"
.include "modules/uart_hw/lowlevel.asm"
.include "modules/uart_hw/m_lowlevel_uart.asm"
.include "modules/uart_hw/ttyonuart1.asm"
.include "modules/uart_hw/comonuart0.asm"
maybeSendDeviceMsg:
ldi yl, LOW(ttyOnUart1_iface)
ldi yh, HIGH(ttyOnUart1_iface)
lds r24, deviceCounter
lds r25, deviceCounter+1
sbiw r25:r24, 1
brne maybeSendDeviceMsg_storeCounter
; send device msg
rcall NET_Buffer_Alloc ; (R16, R17, X)
brcc maybeSendDeviceMsg_end
push r16
adiw xh:xl, 1
rcall NETMSG_Device_Write ; (R16, R17, R18, R19, R20, R21, Z)
sbiw xh:xl, 1
pop r16
rcall NET_Interface_AddOrReleaseOutMsg ; (R16, R17, R18, X)
brcc maybeSendDeviceMsg_end
; reset counter
maybeSendDeviceMsg_resetCounter:
ldi r24, LOW(SEND_DEVICE_EVERY)
ldi r25, HIGH(SEND_DEVICE_EVERY)
maybeSendDeviceMsg_storeCounter:
sts deviceCounter, r24
sts deviceCounter+1, r25
maybeSendDeviceMsg_end:
ret
maybeSendTStatsMsg:
ldi yl, LOW(ttyOnUart1_iface)
ldi yh, HIGH(ttyOnUart1_iface)
lds r24, sendTStatsCounter
lds r25, sendTStatsCounter+1
sbiw r25:r24, 1
brne maybeSendTStatsMsg_storeCounter
rcall sendTStatsForUart0ToUart1
; reset counter
maybeSendTStatsMsg_resetCounter:
ldi r24, LOW(SEND_STATS_EVERY)
ldi r25, HIGH(SEND_STATS_EVERY)
maybeSendTStatsMsg_storeCounter:
sts sendTStatsCounter, r24
sts sendTStatsCounter+1, r25
maybeSendTStatsMsg_end:
ret
sendTStatsForUart0ToUart1:
push yl
push yh
; send device msg
rcall NET_Buffer_Alloc ; (R16, R17, X)
brcc sendTStatsForUart0ToUart1_end
push r16
ldi yl, LOW(comOnUart0_iface)
ldi yh, HIGH(comOnUart0_iface)
adiw xh:xl, 1
rcall NETMSG_SendStats_Write ; (R16, R17, R18, R19, R20, R21, Z)
sbiw xh:xl, 1
pop r16
ldi yl, LOW(ttyOnUart1_iface)
ldi yh, HIGH(ttyOnUart1_iface)
rcall NET_Interface_AddOrReleaseOutMsg ; (R16, R17, R18, X)
sendTStatsForUart0ToUart1_end:
pop yh
pop yl
ret
maybeSendRStatsMsg:
ldi yl, LOW(ttyOnUart1_iface)
ldi yh, HIGH(ttyOnUart1_iface)
lds r24, sendRStatsCounter
lds r25, sendRStatsCounter+1
sbiw r25:r24, 1
brne maybeSendRStatsMsg_storeCounter
rcall sendRStatsForUart0ToUart1
; rcall sendRStatsForUart1ToUart1
; reset counter
maybeSendRStatsMsg_resetCounter:
ldi r24, LOW(SEND_STATS_EVERY)
ldi r25, HIGH(SEND_STATS_EVERY)
maybeSendRStatsMsg_storeCounter:
sts sendRStatsCounter, r24
sts sendRStatsCounter+1, r25
maybeSendRStatsMsg_end:
ret
sendRStatsForUart0ToUart1:
push yl
push yh
; send device msg
rcall NET_Buffer_Alloc ; (R16, R17, X)
brcc sendRStatsForUart0ToUart1_end
push r16
ldi yl, LOW(comOnUart0_iface)
ldi yh, HIGH(comOnUart0_iface)
adiw xh:xl, 1
rcall NETMSG_RecvStats_Write ; (R16, R17, R18, R19, R20, R21, Z)
sbiw xh:xl, 1
pop r16
ldi yl, LOW(ttyOnUart1_iface)
ldi yh, HIGH(ttyOnUart1_iface)
rcall NET_Interface_AddOrReleaseOutMsg ; (R16, R17, R18, X)
sendRStatsForUart0ToUart1_end:
pop yh
pop yl
ret
sendRStatsForUart1ToUart1:
push yl
push yh
ldi yl, LOW(ttyOnUart1_iface)
ldi yh, HIGH(ttyOnUart1_iface)
; send device msg
rcall NET_Buffer_Alloc ; (R16, R17, X)
brcc sendRStatsForUart1ToUart1_end
push r16
adiw xh:xl, 1
rcall NETMSG_RecvStats_Write ; (R16, R17, R18, R19, R20, R21, Z)
sbiw xh:xl, 1
pop r16
rcall NET_Interface_AddOrReleaseOutMsg ; (R16, R17, R18, X)
sendRStatsForUart1ToUart1_end:
pop yh
pop yl
ret
maybeSendMStatsMsg:
ldi yl, LOW(ttyOnUart1_iface)
ldi yh, HIGH(ttyOnUart1_iface)
lds r24, sendMStatsCounter
lds r25, sendMStatsCounter+1
sbiw r25:r24, 1
brne maybeSendMStatsMsg_storeCounter
; send device msg
rcall NET_Buffer_Alloc ; (R16, R17, X)
; brcc maybeSendTStatsMsg_resetCounter
brcc maybeSendMStatsMsg_end
push r16
adiw xh:xl, 1
rcall NETMSG_MemStats_Write ; (R16, R17, R18, R19, R20, R21)
sbiw xh:xl, 1
pop r16
rcall NET_Interface_AddOrReleaseOutMsg ; (R16, R17, R18, X)
brcc maybeSendMStatsMsg_end
; reset counter
maybeSendMStatsMsg_resetCounter:
ldi r24, LOW(SEND_STATS_EVERY)
ldi r25, HIGH(SEND_STATS_EVERY)
maybeSendMStatsMsg_storeCounter:
sts sendMStatsCounter, r24
sts sendMStatsCounter+1, r25
maybeSendMStatsMsg_end:
ret
checkRecvdMsg:
rcall NET_PeekNextIncomingMsgNum ; check read queue (bufNum->r16)
brcc checkRecvdMsg_end ; no msg, jmp
rcall NET_Buffer_Locate ; (R17)
ld r17, X
andi r17, (NET_IFACE_BUFFER_IFACENUM1_BIT | NET_IFACE_BUFFER_IFACENUM0_BIT)
rcall reverseInterfaceNum ; (R17)
; ldi r17, TTYONUART1_IFACENUM ; DEBUG: send everything to uart1 to test that code first
rcall addMsgToInterface
brcc checkRecvdMsg_end ; could not add, jmp
rcall NET_GetNextIncomingMsgNum ; take off the queue
rjmp checkRecvdMsg
checkRecvdMsg_end:
ret
freeRecvdMsg:
rcall NET_GetNextIncomingMsgNum ; take off the queue
brcc freeRecvdMsg_end
rcall NET_Buffer_ReleaseByNum ; delete
freeRecvdMsg_end:
ret
; @return r17 reversed interface number
; @param r17 buffer num
; @clobbers r17
reverseInterfaceNum:
cpi r17, COMONUART0_IFACENUM
brne reverseInterfaceNum_notUart0
ldi r17, TTYONUART1_IFACENUM
ret
reverseInterfaceNum_notUart0:
ldi r17, COMONUART0_IFACENUM
ret
; @end
; @param r16 buffer num
; @param r17 interface num
addMsgToInterface:
cpi r17, COMONUART0_IFACENUM
brne addMsgToInterface_notUart0
ldi yl, LOW(comOnUart0_iface)
ldi yh, HIGH(comOnUart0_iface)
rjmp NET_Interface_AddOutgoingMsgNum ; try to add msg to interface
addMsgToInterface_notUart0:
cpi r17, TTYONUART1_IFACENUM
brne addMsgToInterface_end
ldi yl, LOW(ttyOnUart1_iface)
ldi yh, HIGH(ttyOnUart1_iface)
rjmp NET_Interface_AddOutgoingMsgNum ; try to add msg to interface
addMsgToInterface_end:
clc
ret
; @end
#ifdef WITH_SEND_DEBUG
sendDebug:
ldi yl, LOW(ttyOnUart1_iface)
ldi yh, HIGH(ttyOnUart1_iface)
lds r24, debugMsgCounter
lds r25, debugMsgCounter+1
sbiw r25:r24, 1
brne sendDebug_storeCounter
; send device msg
rcall NET_Buffer_Alloc ; (R16, R17, X)
brcc sendDebug_end
push r16
adiw xh:xl, 1
rcall writeDebugMsg
sbiw xh:xl, 1
pop r16
rcall NET_Interface_AddOrReleaseOutMsg ; (R16, R17, R18, X)
brcc sendDebug_end
; reset counter
sendDebug_resetCounter:
ldi r24, LOW(SEND_DEBUG_EVERY)
ldi r25, HIGH(SEND_DEBUG_EVERY)
sendDebug_storeCounter:
sts debugMsgCounter, r24
sts debugMsgCounter+1, r25
sendDebug_end:
ret
writeDebugMsg:
push yl
push yh
ldi yl, LOW(netBuffers)
ldi yh, HIGH(netBuffers)
rcall writeBufferInfoToRegs
mov r0, r17
mov r1, r18
adiw yh:yl, NET_BUFFERS_SIZE
rcall writeBufferInfoToRegs
mov r2, r17
mov r3, r18
adiw yh:yl, NET_BUFFERS_SIZE
rcall writeBufferInfoToRegs
mov r4, r17
mov r5, r18
adiw yh:yl, NET_BUFFERS_SIZE
rcall writeBufferInfoToRegs
mov r6, r17
mov r7, r18
adiw yh:yl, NET_BUFFERS_SIZE
rcall writeBufferInfoToRegs
mov r8, r17
mov r9, r18
adiw yh:yl, NET_BUFFERS_SIZE
rcall writeBufferInfoToRegs
mov r10, r17
mov r11, r18
adiw yh:yl, NET_BUFFERS_SIZE
clr r12
clr r13
push xl
push xh
rcall NET_Buffer_CountUsed
pop xh
pop xl
mov r14, r16
pop yh
pop yl
rcall NETMSG_Debug_Write ; (R16, R17, R18, R19, R20, R21, Z)
ret
writeBufferInfoToRegs:
ldi r17, 0xff
ldi r18, 0xff
ld r16, Y
andi r16, 0x80
breq writeBufferInfoToRegs_end
ldd r17, Y+(1+2) ; cmd code
ldd r18, Y+(1+3) ; source addr
writeBufferInfoToRegs_end:
ret
#endif
DEBUG1:
ldi r19, 10
ldi r20, 2
ldi r21, 8
rcall blinkLed
rjmp DEBUG1
DEBUG2:
ldi r19, 50
ldi r20, 1
ldi r21, 1
rcall blinkLed
rjmp DEBUG2
; @param r19 loop count
; @param r20 on time
; @param r21 off time
; @clobbers (R16, R18, R22, R24, R25)
blinkLed:
cbi LED_SIMPLE_PORT, LED_SIMPLE_PINNUM ; on
mov r22, r20
rcall waitForMultiple100ms ; (R252
sbi LED_SIMPLE_PORT, LED_SIMPLE_PINNUM ; off
mov r22, r21
rcall waitForMultiple100ms ; (R22)
dec r19
brne blinkLed
ret
; @param r22 number of 100ms periods to wait
waitForMultiple100ms:
waitForMultiple100ms_loop:
push r22
rcall waitFor100ms
pop r22
dec r22
brne waitForMultiple100ms_loop
ret
waitFor100ms:
ldi r22, 10
waitFor100ms_loop:
push r22
rcall waitFor10ms
pop r22
dec r22
brne waitFor100ms_loop
ret
waitFor10ms:
ldi r22, 100
waitFor10ms_loop:
push r22
rcall Utils_WaitFor100MicroSecs
pop r22
dec r22
brne waitFor10ms_loop
ret
; ***************************************************************************
; data in SRAM
.dseg
programRamBegin:
flashUid: .byte 4
deviceCounter: .byte 2
sendTStatsCounter: .byte 2
sendRStatsCounter: .byte 2
sendMStatsCounter: .byte 2
#ifdef WITH_SEND_DEBUG
debugMsgCounter: .byte 2
#endif
programRamEnd:

289
avr/devices/t03/main/main2.asm Normal file
View File

@@ -0,0 +1,289 @@
; ***************************************************************************
; copyright : (C) 2024 by Martin Preuss
; email : martin@libchipcard.de
;
; ***************************************************************************
; * This file is part of the project "AqHome". *
; * Please see toplevel file COPYING of that project for license details. *
; ***************************************************************************
; ***************************************************************************
; Source file for temperature sensor node on AtTiny 84
;
; This is for the full system (i.e. not the boot loader).
;
; All definitions and changes should go into this file.
;
;
; ***************************************************************************
;.equ clock=1000000 ; Define the clock frequency
.equ clock=8000000 ; Define the clock frequency
.nolist
.include "include/tn841def.inc" ; Define device ATtiny841
.list
.include "../defs.asm"
.include "defs_all.asm"
; ***************************************************************************
; defines
; ---------------------------------------------------------------------------
; generic
.include "common/utils_wait.asm"
; ---------------------------------------------------------------------------
; firmware settings including list of modules used
.equ FIRMWARE_VERSION_MAJOR = 0
.equ FIRMWARE_VERSION_MINOR = 0
.equ FIRMWARE_VERSION_PATCHLEVEL = 1
#define MAIN_WITHOUT_MSG_HANDLING ; we do message handling ourselfes
#define MODULES_CLOCK
;#define MODULES_COM
;#define MODULES_COM_WITH_ADDR_PROTO
;#define MODULES_LED
#define MODULES_LED_SIMPLE
;#define MODULES_TWI_MASTER
;#define MODULES_LCD
;#define LCD_MINIMAL_FONT
;#define MODULES_SI7021
;#define MODULES_STATS
;#define MODULES_CNY70
;#define MODULES_REED
;#define MODULES_OWI_MASTER
;#define MODULES_DS18B20
;#define MODULES_MOTION
#define MODULES_NETWORK
#define MODULES_TTYONUART1
#define MODULES_COMONUART0
#define APPS_STATS
.equ NET_BUFFERS_NUM = 8
.equ NET_BUFFERS_SIZE = 32
.equ UART_HW_MSGNUMINBUF_SIZE = 8
.equ UART_HW_MSGNUMOUTBUF_SIZE = 8
; ***************************************************************************
; code segment
.cseg
.org 000000
; ---------------------------------------------------------------------------
; Reset and interrupt vectors
rjmp BOOTLOADER_ADDR ; 1: RESET Reset vector use this for flashed system
reti ; 2: INT0 External Interrupt Request 0
rjmp ComOnUart0_AttnChangeIsr ; 3: PCINT0 Pin Change Interrupt 0
reti ; 4: PCINT1 Pin Change Interrupt 1
reti ; 5: WDT Watchdog Time-out
reti ; 6: TIM1_CAPT Timer/Counter1 Capture Event
reti ; 7: TIM1_COMPA (OC1A) Timer/Counter1 Compare Match A
reti ; 8: TIM1_COMPB (OC1B) Timer/Counter1 Compare Match B
reti ; 9: TIM1_OVF (OVF1) Timer/Counter1 Overflow
rjmp baseTimerIrqOC0A ; 10: TIM0_COMPA (OC0A) Timer/Counter0 Compare Match A
reti ; 11: TIM0_COMPB (OC0B) Timer/Counter0 Compare Match B
reti ; 12: TIM0_OVF (OVF0) Timer/Counter0 Overflow
reti ; 13: ANA_COMP0 Analog Comparator 0
reti ; 14: ADC_READY ADC Conversion Complete
reti ; 15: EE_RDY (ERDY) EEPROM Ready
reti ; 16: ANA_COMP1 Analog Comparator 1
reti ; 17: TIM2_CAPT Timer/Counter2 Capture Event
reti ; 18: TIM2_COMPA (OC2A) Timer/Counter2 Compare Match A
reti ; 19: TIM2_COMPB (OC2B) Timer/Counter2 Compare Match B
reti ; 20: TIM2_OVF (OVF2) Timer/Counter2 Overflow
reti ; 21: SPI SPI Serial Transfer Complete
reti ; 22: USART0_RXS USART0 Rx Start
rjmp ComOnUart0_RxCharIsr ; 23: USART0_RXC USART0 Rx Complete
rjmp ComOnUart0_TxUdreIsr ; 24: USART0_DRE USART0 Data Register Empty
rjmp ComOnUart0_TxCharIsr ; 25: USART0_TXC USART0 Tx Complete
reti ; 26: USART1_RXS USART1 Rx Start
rjmp TtyOnUart1_RxCharIsr ; 27: USART1_RXC USART1 Rx Complete
rjmp TtyOnUart1_TxUdreIsr ; 28: USART1_DRE USART1 Data Register Empty
rjmp TtyOnUart1_TxCharIsr ; 29: USART1_TXC USART1 Tx Complete
reti ; 30: TWI Two-Wire-Interface
reti ; 31: RESERVED reserved
devInfoBlock: ; 12 bytes
devInfoManufacturer: .db 'A', 'Q', 'U', 'A'
devInfoId: .db DEVICEINFO_ID, 0
devInfoVersion: .db DEVICEINFO_VERSION, DEVICEINFO_REVISION ; version, revision
firmwareVersion: .db FIRMWARE_VARIANT_TEMP_WINDOW, FIRMWARE_VERSION_MAJOR
.db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL
; ---------------------------------------------------------------------------
; @routine firmwareStart @global
firmwareStart:
rjmp main
; @end
; ---------------------------------------------------------------------------
; @routine onSystemStart
onSystemStart:
ret
; @end
onEvery100ms:
onEverySecond:
onEveryMinute:
onEveryHour:
onEveryDay:
ret
; ---------------------------------------------------------------------------
; @routine onEveryLoop
;
; Called on every loop (i.e. after awakening from sleep).
onEveryLoop:
rcall checkRecvdMsg
ret
; @end
; ---------------------------------------------------------------------------
; @routine onMessageReceived
;
; Called on every message received
onMessageReceived:
clc
ret
; @end
; ---------------------------------------------------------------------------
; @routine checkRecvdMsg
;
; Read messages from either interface and forward to the other one.
checkRecvdMsg:
rcall NET_PeekNextIncomingMsgNum ; check read queue (bufNum->r16)
brcc checkRecvdMsg_end ; no msg, jmp
rcall NET_Buffer_Locate ; (R17)
; let system handle incoming messages
push xl
push xh
rcall onMessageReceived
rcall mainModulesOnPacketReceived
rcall mainAppsOnPacketReceived
pop xh
pop xl
; forward to other interface
ld r17, X
andi r17, (NET_IFACE_BUFFER_IFACENUM1_BIT | NET_IFACE_BUFFER_IFACENUM0_BIT)
rcall reverseInterfaceNum ; (R17)
; ldi r17, TTYONUART1_IFACENUM ; DEBUG: send everything to uart1 to test that code first
rcall addMsgToInterface
brcc checkRecvdMsg_end ; could not add, jmp
rcall NET_GetNextIncomingMsgNum ; take off the queue
rjmp checkRecvdMsg
checkRecvdMsg_end:
ret
; @end
; ---------------------------------------------------------------------------
; @routine reverseInterfaceNum
;
; @param r17 buffer num
; @return r17 reversed interface number
; @clobbers r17
reverseInterfaceNum:
cpi r17, COMONUART0_IFACENUM
brne reverseInterfaceNum_notUart0
ldi r17, TTYONUART1_IFACENUM
ret
reverseInterfaceNum_notUart0:
ldi r17, COMONUART0_IFACENUM
ret
; @end
; ---------------------------------------------------------------------------
; @routine addMsgToInterface
; @param r16 buffer num
; @param r17 interface num
addMsgToInterface:
cpi r17, COMONUART0_IFACENUM
brne addMsgToInterface_notUart0
ldi yl, LOW(comOnUart0_iface)
ldi yh, HIGH(comOnUart0_iface)
rjmp NET_Interface_AddOutgoingMsgNum ; try to add msg to interface
addMsgToInterface_notUart0:
cpi r17, TTYONUART1_IFACENUM
brne addMsgToInterface_end
ldi yl, LOW(ttyOnUart1_iface)
ldi yh, HIGH(ttyOnUart1_iface)
rjmp NET_Interface_AddOutgoingMsgNum ; try to add msg to interface
addMsgToInterface_end:
clc
ret
; @end
; ***************************************************************************
; includes
.include "devices/all/hw_tn841.asm"
.include "devices/all/includes.asm"
; ---------------------------------------------------------------------------
; defines for network interface
.equ netInterfaceData = ttyOnUart1_iface

2
avr/modules/uart_hw/ttyonuart1.asm
View File

@@ -34,6 +34,8 @@ TtyOnUart1_Init:
rcall ttyOnUart1Init ; (R16, R17, X) rcall ttyOnUart1Init ; (R16, R17, X)
ldi r16, TTYONUART1_IFACENUM ldi r16, TTYONUART1_IFACENUM
std Y+NET_IFACE_OFFS_IFACENUM, r16 std Y+NET_IFACE_OFFS_IFACENUM, r16
ldi r16, 0xfe
std Y+NET_IFACE_OFFS_ADDRESS, r16
ret ret
; @end ; @end