diff --git a/avr/modules/uart_hw2/comonuart1.asm b/avr/modules/uart_hw2/comonuart1.asm
index 9c15a1d..f93b950 100644
--- a/avr/modules/uart_hw2/comonuart1.asm
+++ b/avr/modules/uart_hw2/comonuart1.asm
@@ -451,8 +451,7 @@ comOnUart1StartTx:
   cbr r16, (1<<TXC1)                             ; clear TXCn interrupt
   outr UCSR1A, r16
   inr r16, UCSR1B
-;  sbr r16, (1<<UDRIE1) | (1<<TXC1) | (1<<TXEN1)  ; enable TX UDRE and TXC1 interrupt, enable transceive
-  sbr r16, (1<<UDRIE1) | (1<<TXEN1)  ; enable TX UDRE interrupt, enable transceive
+  sbr r16, (1<<UDRIE1) | (1<<TXC1) | (1<<TXEN1)  ; enable TX UDRE and TXC1 interrupt, enable transceive
   outr UCSR1B, r16
   ret
 ; @end
@@ -777,11 +776,6 @@ comOnUart1TxUdreIsr:
   std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
   ; send byte
   outr UDR1, r16                               ; send byte
-
-  inr r16, UCSR1B
-  sbr r16, (1<<TXC1)                          ; enable TXC1 interrupt
-  outr UCSR1B, r16
-
   ; decrease counter
   dec r17
   std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
@@ -810,9 +804,6 @@ comOnUart1TxUdreIsr_end:
 ; @clobbers R16, R17
 
 comOnUart1TxCharIsr:
-  ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
-  cpi r16, UART_HW2_MODE_WAITBUFFEREMPTY
-  brne comOnUart1TxCharIsr_end
   ; disable further TXC interrupts
   inr r16, UCSR1B
   cbr r16, (1<<TXC1)                          ; disable TXC1 interrupt
@@ -820,7 +811,6 @@ comOnUart1TxCharIsr:
   rcall comOnUart1StopTx                      ; (R16)
   ldi r16, UART_HW2_MODE_MSGSENT
   rcall comOnUart1SetMode                     ; (R17)
-comOnUart1TxCharIsr_end:
   ret
 ; @end