avr: added first version of ds18b20 code.
This commit is contained in:
Martin Preuss
11
avr/modules/ds18b20/0BUILD
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11
avr/modules/ds18b20/0BUILD
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<?xml?>
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<gwbuild>
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<extradist>
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main.asm
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</extradist>
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</gwbuild>
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266
avr/modules/ds18b20/main.asm
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266
avr/modules/ds18b20/main.asm
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; ***************************************************************************
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; copyright : (C) 2024 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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; ***************************************************************************
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; defs
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.equ DS18B20_ROMCMD_READROM = 0x33
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.equ DS18B20_ROMCMD_SKIPROM = 0xcc
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.equ DS18B20_FNCMD_CONVERT = 0x44
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.equ DS18B20_FNCMD_READSCRATCHPAD = 0xbe
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.equ DS18B20_FLAGS_CONV_STARTED = 0x01
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.equ DS18B20_FLAGS_CONV_UPDATED = 0x02
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; ***************************************************************************
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; data
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.dseg
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ds18b20DataBegin:
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ds18b20Flags: .byte 1
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ds18b20DataBuffer: .byte 9
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ds18b20DataTemp: .byte 2
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ds18b20DataEnd:
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; ***************************************************************************
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; code
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.cseg
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DS18B20_BEGIN:
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; ---------------------------------------------------------------------------
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; @routine Ds18b20_Init
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;
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; Init module.
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;
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; @return CFLAG set if okay, cleared on error
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; @clobbers r16, r17, X
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Ds18b20_Init:
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; preset SRAM data area
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ldi xh, HIGH(ds18b20DataBegin)
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ldi xl, LOW(ds18b20DataBegin)
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clr r16
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ldi r17, (ds18b20DataEnd-ds18b20DataBegin)
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rcall Utils_FillSram ; (r17, x)
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ret
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Ds18b20_Fini:
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sec
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ret
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Ds18b20_Run:
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lds r16, ds18b20Flags
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andi r16, DS18B20_FLAGS_CONV_UPDATED ; new value?
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breq Ds18b20_Run_done ; nope, jump
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rcall Ds18b20_SendTemp ; send value
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brcc Ds18b20_Run_done ; jump on error
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lds r16, ds18b20Flags ; value sent, clear flag
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andi r16, ~DS18B20_FLAGS_CONV_UPDATED
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sts ds18b20Flags, r16
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Ds18b20_Run_done:
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clc
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ret
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Ds18b20_OnTimer:
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lds r16, ds18b20Flags
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andi r16, DS18B20_FLAGS_CONV_STARTED
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breq Ds18b20_OnTimer_startConversion
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; conversion complete, read value, set flags
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ldi xl, LOW(ds18b20DataBuffer)
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ldi xh, HIGH(ds18b20DataBuffer)
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push r15
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in r15, SREG
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cli
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rcall ds18b20ReadScratchPad
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brcc Ds18b20_OnTimer_popr15ret
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out SREG, r15
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pop r15
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ld r16, X+ ; copy temp from scratchpad
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sts ds18b20DataTemp, r16
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ld r16, X+
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sts ds18b20DataTemp+1, r16
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lds r16, ds18b20Flags
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andi r16, ~DS18B20_FLAGS_CONV_STARTED
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ori r16, DS18B20_FLAGS_CONV_UPDATED
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sts ds18b20Flags, r16
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ret
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Ds18b20_OnTimer_startConversion:
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push r15
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in r15, SREG
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cli
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ldi r16, DS18B20_FNCMD_CONVERT
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rcall Ds18b20_SendCommand
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brcc Ds18b20_OnTimer_popr15ret
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lds r16, ds18b20Flags
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ori r16, DS18B20_FLAGS_CONV_STARTED
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sts ds18b20Flags, r16
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Ds18b20_OnTimer_popr15ret:
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out SREG, r15
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pop r15
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Ds18b20_OnTimer_done:
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ret
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; ---------------------------------------------------------------------------
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; @routine Ds18b20_SendCommand @global
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;
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; Reset bus, send SKIP ROM and send command.
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; Cave: Needs interrupts to be disabled!
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;
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; @param r16 command to send
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; @clobbers r18 (r21, r22)
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Ds18b20_SendCommand:
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mov r18, r16
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rcall OwiMaster_Reset ; (r22)
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tst r16 ; presence detected?
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breq Ds18b20_SendCommand_error ; nope, jump
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ldi r16, DS18B20_ROMCMD_SKIPROM ; skip rom
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rcall OwiMaster_SendByte ; (r21, r22)
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mov r16, r18 ; command to send
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rcall OwiMaster_SendByte ; (r21, r22)
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sec
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ret
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Ds18b20_SendCommand_error:
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clc
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine Ds18b20_ReadRom @global
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;
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; Send READ ROM and read result into buffer.
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; Cave: Needs interrupts to be disabled!
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;
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; @return CFLAG set if okay, cleared on error
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; @return X points directly behind the last byte received
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; @param X pointer to SDRAM to receive 8 bytes
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; @clobbers r16, r18, r19, r23, X (r17, r20, r21, r22)
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Ds18b20_ReadRom:
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rcall OwiMaster_Reset ; (r22)
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tst r16 ; presence detected?
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breq Ds18b20_ReadRom_error ; nope, jump
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ldi r16, DS18B20_ROMCMD_READROM
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rcall OwiMaster_SendByte ; (r21, r22)
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ldi r23, 8
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Ds18b20_ReadRom_loop1:
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Utils_WaitNanoSecs 10000, 0, r22
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rcall OwiMaster_RecvByte ; (r21, r22)
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st X+, r16
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dec r23
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brne Ds18b20_ReadRom_loop1
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sbiw xh:xl, 8
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ldi r18, 7
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ldi r19, 0x99
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rcall crc8Calc ; (R16, R17, R18, R20, X)
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ld r17, X+
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cp r16, r17
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brne Ds18b20_ReadRom_error
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sec
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ret
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Ds18b20_ReadRom_error:
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clc
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ds18b20ReadScratchPad
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;
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; Send SKIP_ROM, READ_SCRATCHPAD and read 9 byte result into buffer.
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;
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; Cave: Needs interrupts to be disabled!
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;
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; @return CFLAG set if okay, cleared on error
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; @return X unchanged if CFLAG set (otherwise clobbered)
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; @param X pointer to SDRAM to receive 8 bytes
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; @clobbers r16, r18, r19, r23, X (r17, r20, r21, r22)
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ds18b20ReadScratchPad:
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ldi r16, DS18B20_FNCMD_READSCRATCHPAD
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rcall Ds18b20_SendCommand
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brcc ds18b20ReadScratchPad_error
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ldi r23, 9
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ds18b20ReadScratchPad_loop1:
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Utils_WaitNanoSecs 10000, 0, r22
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rcall OwiMaster_RecvByte ; (r21, r22)
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st X+, r16
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dec r23
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brne ds18b20ReadScratchPad_loop1
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sbiw xh:xl, 9
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ldi r18, 8
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ldi r19, 0x99
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rcall crc8Calc ; (R16, R17, R18, R20, X)
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ld r17, X+
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cp r16, r17
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; brne ds18b20ReadScratchPad_error
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sbiw xh:xl, 9
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sec
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ret
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ds18b20ReadScratchPad_error:
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clc
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ret
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; @end
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Ds18b20_SendTemp:
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ldi r16, 0xff ; destination address
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ldi r17, VALUE_ID_DS18B20_TEMP ; value id
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ldi r22, AQHOME_VALUETYPE_TEMP
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lds r18, ds18b20DataTemp ; value
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lds r19, ds18b20DataTemp+1
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ldi r20, 16 ; denominator
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clr r21
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ldi xl, LOW(com2SendBuffer)
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ldi xh, HIGH(com2SendBuffer)
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rcall CPRO_WriteReportValue
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rjmp COM2_SendPacket
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DS18B20_END:
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.equ MODULE_SIZE_DS18B20 = DS18B20_END-DS18B20_BEGIN
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