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avr/uart_hw: basically works for a while then stops...

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This commit is contained in:
Martin Preuss
2025-03-21 20:55:50 +01:00
parent 2964347e7b
commit 373a553ac8
14 changed files with 685 additions and 122 deletions
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121
avr/modules/uart_hw/lowlevel_uart0.asm
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@@ -97,7 +97,97 @@ UART_HW_Uart0_Flush:
; @clobbers R16 (R17, R18, R24, R25, X)
UART_HW_Uart0_RxCharIsr:
M_UART_HW_Uart_RxCharIsr 0
; check for errors
lds r16, UCSR0A ; check for errors
andi r16, (1<<FE0) | (1<<DOR0) | (1<<UPE0)
brne l_hwerr
; read char
lds r16, UCSR0A
sbrs r16, RXC0
rjmp l_end ; no data
lds r16, UDR0 ; r16=received char
; check read mode
ldd r17, Y+UART_HW_IFACE_OFFS_READMODE
cpi r17, UART_HW_READMODE_READING
breq l_storeChar
cpi r17, UART_HW_READMODE_SKIPPING
breq l_skipChar
rjmp l_overrun ; neither read nor skip mode
l_skipChar:
clr r16
std Y+NET_IFACE_OFFS_READTIMER, r16 ; reset read timer
rjmp l_end
l_storeChar:
mov r18, r16 ; r18=received char
; check buffer
ldd r16, Y+UART_HW_IFACE_OFFS_READBUFNUM
cpi r16, 0xff
breq l_overrun
; check for buffer overrun
ldd r17, Y+UART_HW_IFACE_OFFS_READBUFLEFT ; r17=bytes left
tst r17
breq l_econtent ; msg too long
; actually store byte, increment/decrement counters and pos
ldd xl, Y+UART_HW_IFACE_OFFS_READBUFPOS_LOW
ldd xh, Y+UART_HW_IFACE_OFFS_READBUFPOS_HIGH
st X+, r18 ; r18=byte to store
clr r16
std Y+NET_IFACE_OFFS_READTIMER, r16 ; reset read timer
std Y+UART_HW_IFACE_OFFS_READBUFPOS_LOW, xl
std Y+UART_HW_IFACE_OFFS_READBUFPOS_HIGH, xh
ldd r18, Y+UART_HW_IFACE_OFFS_READBUFUSED ; r18=bytes in buffer
inc r18
std Y+UART_HW_IFACE_OFFS_READBUFUSED, r18
dec r17
std Y+UART_HW_IFACE_OFFS_READBUFLEFT, r17
breq l_msgFinished
; check msg size
cpi r18, 2 ; bytes in buffer, exactly 2?
brne l_end ; nope, done
sbiw xh:xl, 1 ; yes, determine message length (msgLen at previous pos)
ld r16, X+ ; read payload length byte
subi r16, -3 ; add 3 (dest addr, length, crc byte)
cpi r16, (NET_BUFFERS_SIZE-1) ; total msg length ok?
brcc l_econtent ; content error (msg too long)
subi r16, 2 ; subtract bytes already received
std Y+UART_HW_IFACE_OFFS_READBUFLEFT, r16 ; set new number of bytes left
brne l_end ; jmp if still bytes left to receive
l_msgFinished:
rcall UART_HW_Uart0_StopRx ; (R16)
ldd r16, Y+UART_HW_IFACE_OFFS_READBUFNUM
rcall NET_AddIncomingMsgNum ; (R17, R18, X)
brcs l_msgAdded
; could not add msg
rcall NET_Buffer_ReleaseByNum ; (R16, X)
ldi r16, 0xff
std Y+UART_HW_IFACE_OFFS_READBUFNUM, r16
ldi r16, NET_IFACE_OFFS_ERR_MISSED_LOW
ldi r17, UART_HW_READMODE_IDLE
rjmp l_incCounterAndEnterMode
l_msgAdded:
ldi r16, 0xff
std Y+UART_HW_IFACE_OFFS_READBUFNUM, r16
ldi r16, NET_IFACE_OFFS_PACKETSIN_LOW
ldi r17, UART_HW_READMODE_IDLE
rjmp l_incCounterAndEnterMode
l_hwerr:
ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
rjmp l_incCounterAndEnterSkipping
l_econtent:
ldi r16, NET_IFACE_OFFS_ERR_CONTENT_LOW
rjmp l_incCounterAndEnterSkipping
l_overrun:
ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
l_incCounterAndEnterSkipping:
ldi r17, UART_HW_READMODE_SKIPPING
l_incCounterAndEnterMode:
rcall NET_Interface_IncCounter16 ; (R24, R25)
std Y+UART_HW_IFACE_OFFS_READMODE, r17 ; set read mode
l_end:
ret
; @end
@@ -134,3 +224,32 @@ UART_HW_Uart0_TxCharIsr:
; ---------------------------------------------------------------------------
; @routine UART_HW_Uart0_SetAttnInput @global
;
; Set ATTN line as input (making it effectively HIGH due to pull-up resistor on
; the line)
;
; @clobbers none
UART_HW_Uart0_SetAttnInput:
M_UART_HW_Uart_SetAttnInput
ret
; @end
; ---------------------------------------------------------------------------
; @routine UART_HW_Uart0_SetAttnLow @global
;
; Set ATTN line low.
;
; @clobbers none
UART_HW_Uart0_SetAttnLow:
M_UART_HW_Uart_SetAttnLow
ret
; @end