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avr/uart_hw: basically works for a while then stops...

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This commit is contained in:
Martin Preuss
2025-03-21 20:55:50 +01:00
parent 2964347e7b
commit 373a553ac8
14 changed files with 685 additions and 122 deletions
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1
avr/devices/t03/defs.asm
View File

@@ -54,6 +54,7 @@
.equ COM_ATTN_DDR = DDRA
.equ COM_ATTN_INPUT = PINA
.equ COM_ATTN_OUTPUT = PORTA
.equ COM_ATTN_PUE = PUEA
.equ COM_ATTN_PIN = PORTA0
.equ COM_IRQ_ADDR_ATTN = PCMSK0

250
avr/devices/t03/main.asm
View File

@@ -25,8 +25,9 @@
.equ clock=8000000 ; Define the clock frequency
;.equ SEND_DEVICE_EVERY = 3000
.equ SEND_DEVICE_EVERY = 100 ; every 10s
.equ SEND_STATS_EVERY = 600 ; every minute
.equ SEND_DEVICE_EVERY = 520 ; every 52s
.equ SEND_STATS_EVERY = 240 ; every 24s
.equ SEND_DEBUG_EVERY = 110
.nolist
.include "include/tn841def.inc" ; Define device ATtiny841
@@ -90,37 +91,37 @@
; ---------------------------------------------------------------------------
; Reset and interrupt vectors
rjmp BOOTLOADER_ADDR ; 1: RESET Reset vector use this for flashed system
reti ; 2: INT0 External Interrupt Request 0
reti ; 3: PCINT0 Pin Change Interrupt 0
reti ; 4: PCINT1 Pin Change Interrupt 1
reti ; 5: WDT Watchdog Time-out
reti ; 6: TIM1_CAPT Timer/Counter1 Capture Event
reti ; 7: TIM1_COMPA (OC1A) Timer/Counter1 Compare Match A
reti ; 8: TIM1_COMPB (OC1B) Timer/Counter1 Compare Match B
reti ; 9: TIM1_OVF (OVF1) Timer/Counter1 Overflow
rjmp baseTimerIrqOC0A ; 10: TIM0_COMPA (OC0A) Timer/Counter0 Compare Match A
reti ; 11: TIM0_COMPB (OC0B) Timer/Counter0 Compare Match B
reti ; 12: TIM0_OVF (OVF0) Timer/Counter0 Overflow
reti ; 13: ANA_COMP0 Analog Comparator 0
reti ; 14: ADC_READY ADC Conversion Complete
reti ; 15: EE_RDY (ERDY) EEPROM Ready
reti ; 16: ANA_COMP1 Analog Comparator 1
reti ; 17: TIM2_CAPT Timer/Counter2 Capture Event
reti ; 18: TIM2_COMPA (OC2A) Timer/Counter2 Compare Match A
reti ; 19: TIM2_COMPB (OC2B) Timer/Counter2 Compare Match B
reti ; 20: TIM2_OVF (OVF2) Timer/Counter2 Overflow
reti ; 21: SPI SPI Serial Transfer Complete
reti ; 22: USART0_RXS USART0 Rx Start
reti ; 23: USART0_RXC USART0 Rx Complete
reti ; 24: USART0_DRE USART0 Data Register Empty
reti ; 25: USART0_TXC USART0 Tx Complete
reti ; 26: USART1_RXS USART1 Rx Start
rjmp TtyOnUart1_RxCharIsr ; 27: USART1_RXC USART1 Rx Complete
rjmp TtyOnUart1_TxUdreIsr ; 28: USART1_DRE USART1 Data Register Empty
rjmp TtyOnUart1_TxCharIsr ; 29: USART1_TXC USART1 Tx Complete
reti ; 30: TWI Two-Wire-Interface
reti ; 31: RESERVED reserved
rjmp BOOTLOADER_ADDR ; 1: RESET Reset vector use this for flashed system
reti ; 2: INT0 External Interrupt Request 0
rjmp ComOnUart0_AttnChangeIsr ; 3: PCINT0 Pin Change Interrupt 0
reti ; 4: PCINT1 Pin Change Interrupt 1
reti ; 5: WDT Watchdog Time-out
reti ; 6: TIM1_CAPT Timer/Counter1 Capture Event
reti ; 7: TIM1_COMPA (OC1A) Timer/Counter1 Compare Match A
reti ; 8: TIM1_COMPB (OC1B) Timer/Counter1 Compare Match B
reti ; 9: TIM1_OVF (OVF1) Timer/Counter1 Overflow
rjmp baseTimerIrqOC0A ; 10: TIM0_COMPA (OC0A) Timer/Counter0 Compare Match A
reti ; 11: TIM0_COMPB (OC0B) Timer/Counter0 Compare Match B
reti ; 12: TIM0_OVF (OVF0) Timer/Counter0 Overflow
reti ; 13: ANA_COMP0 Analog Comparator 0
reti ; 14: ADC_READY ADC Conversion Complete
reti ; 15: EE_RDY (ERDY) EEPROM Ready
reti ; 16: ANA_COMP1 Analog Comparator 1
reti ; 17: TIM2_CAPT Timer/Counter2 Capture Event
reti ; 18: TIM2_COMPA (OC2A) Timer/Counter2 Compare Match A
reti ; 19: TIM2_COMPB (OC2B) Timer/Counter2 Compare Match B
reti ; 20: TIM2_OVF (OVF2) Timer/Counter2 Overflow
reti ; 21: SPI SPI Serial Transfer Complete
reti ; 22: USART0_RXS USART0 Rx Start
rjmp ComOnUart0_RxCharIsr ; 23: USART0_RXC USART0 Rx Complete
rjmp ComOnUart0_TxUdreIsr ; 24: USART0_DRE USART0 Data Register Empty
rjmp ComOnUart0_TxCharIsr ; 25: USART0_TXC USART0 Tx Complete
reti ; 26: USART1_RXS USART1 Rx Start
rjmp TtyOnUart1_RxCharIsr ; 27: USART1_RXC USART1 Rx Complete
rjmp TtyOnUart1_TxUdreIsr ; 28: USART1_DRE USART1 Data Register Empty
rjmp TtyOnUart1_TxCharIsr ; 29: USART1_TXC USART1 Tx Complete
reti ; 30: TWI Two-Wire-Interface
reti ; 31: RESERVED reserved
@@ -203,11 +204,12 @@ onSystemTimerTick:
#ifdef MODULES_LED_SIMPLE
rcall LedSimple_Every100ms
#endif
rcall TtyOnUart1_Periodically
rcall sendDebug
rcall maybeSendDeviceMsg
rcall maybeSendTStatsMsg
rcall maybeSendRStatsMsg
rcall maybeSendMStatsMsg
rcall TtyOnUart1_Periodically
ret
@@ -240,6 +242,9 @@ initModules:
rcall LedSimple_Init
rcall NET_Init
rcall TtyOnUart1_Init
ldi r16, 0xfe
sts ttyOnUart1_iface+NET_IFACE_OFFS_ADDRESS, r16
rcall ComOnUart0_Init
ldi r16, LOW(SEND_DEVICE_EVERY)
sts deviceCounter, r16
@@ -261,6 +266,11 @@ initModules:
ldi r16, HIGH(SEND_STATS_EVERY+20)
sts sendMStatsCounter+1, r16
ldi r16, LOW(SEND_DEBUG_EVERY)
sts debugMsgCounter, r16
ldi r16, HIGH(SEND_DEBUG_EVERY)
sts debugMsgCounter+1, r16
ret
; @end
@@ -292,12 +302,15 @@ initModules:
.include "modules/network/msg/sendstats-w.asm"
.include "modules/network/msg/recvstats-w.asm"
.include "modules/network/msg/memstats-w.asm"
.include "modules/network/msg/debug-w.asm"
.include "modules/uart_hw/defs.asm"
.include "modules/uart_hw/lowlevel.asm"
.include "modules/uart_hw/m_lowlevel_uart.asm"
.include "modules/uart_hw/lowlevel_uart0.asm"
.include "modules/uart_hw/lowlevel_uart1.asm"
.include "modules/uart_hw/ttyonuart1.asm"
.include "modules/uart_hw/comonuart0.asm"
@@ -320,12 +333,8 @@ maybeSendDeviceMsg:
rcall NETMSG_Device_Write ; (R16, R17, R18, R19, R20, R21, Z)
sbiw xh:xl, 1
pop r16
push r16
rcall NET_Interface_AddOutgoingMsgNum ; (R17, R18, X)
pop r16
brcs maybeSendDeviceMsg_resetCounter
rcall NET_Buffer_ReleaseByNum ; (R16, X)
rjmp maybeSendDeviceMsg_end
rcall NET_Interface_AddOrReleaseOutMsg ; (R16, R17, R18, X)
brcc maybeSendDeviceMsg_end
; reset counter
maybeSendDeviceMsg_resetCounter:
ldi r24, LOW(SEND_DEVICE_EVERY)
@@ -382,9 +391,15 @@ maybeSendRStatsMsg:
; brcc maybeSendTStatsMsg_resetCounter
brcc maybeSendRStatsMsg_end
push r16
adiw xh:xl, 1
rcall NETMSG_RecvStats_Write ; (R16, R17, R18, R19, R20, R21, Z)
sbiw xh:xl, 1
push yl
push yh
ldi yl, LOW(comOnUart0_iface)
ldi yh, HIGH(comOnUart0_iface)
adiw xh:xl, 1
rcall NETMSG_RecvStats_Write ; (R16, R17, R18, R19, R20, R21, Z)
sbiw xh:xl, 1
pop yh
pop yl
pop r16
rcall NET_Interface_AddOrReleaseOutMsg ; (R16, R17, R18, X)
brcc maybeSendRStatsMsg_end
@@ -432,10 +447,7 @@ maybeSendMStatsMsg_end:
checkRecvdMsg:
ldi yl, LOW(ttyOnUart1_iface)
ldi yh, HIGH(ttyOnUart1_iface)
rcall NET_PeekNextIncomingMsgNum ; check read queue
rcall NET_PeekNextIncomingMsgNum ; check read queue (bufNum->r16)
brcc checkRecvdMsg_end ; no msg, jmp
rcall NET_Buffer_Locate ; (R17)
adiw xh:xl, 1
@@ -443,20 +455,157 @@ checkRecvdMsg:
rcall NETMSG_CheckMessageInBuffer ; (R16, R17, R18, R19, R20, X)
pop r16
brcs checkRecvdMsg_sendMsg
; release buffer
rcall NET_GetNextIncomingMsgNum ; take off the queue
rcall NET_Buffer_ReleaseByNum ; delete
ldi r16, NET_IFACE_OFFS_ERR_CONTENT_LOW
rcall NET_Interface_IncCounter16 ; (R24, R25)
clc
rjmp checkRecvdMsg_end
checkRecvdMsg_sendMsg:
rcall NET_Interface_AddOutgoingMsgNum ; try to add msg to interface
sbiw xh:xl, 1
ld r17, X
andi r17, (NET_IFACE_BUFFER_IFACENUM1_BIT | NET_IFACE_BUFFER_IFACENUM0_BIT)
rcall reverseInterfaceNum
rcall addMsgToInterface
brcc checkRecvdMsg_end ; could not add, jmp
rcall NET_GetNextIncomingMsgNum ; take off the queue
sec
checkRecvdMsg_end:
ret
; @return r17 reversed interface number
; @param r17 buffer num
; @clobbers r17
reverseInterfaceNum:
cpi r17, COMONUART0_IFACENUM
brne reverseInterfaceNum_notUart0
ldi r17, TTYONUART1_IFACENUM
ret
reverseInterfaceNum_notUart0:
ldi r17, COMONUART0_IFACENUM
ret
; @end
; @param r16 buffer num
; @param r17 interface num
addMsgToInterface:
cpi r16, COMONUART0_IFACENUM
brne addMsgToInterface_notUart0
ldi yl, LOW(ttyOnUart1_iface)
ldi yh, HIGH(ttyOnUart1_iface)
rjmp NET_Interface_AddOutgoingMsgNum ; try to add msg to interface
addMsgToInterface_notUart0:
cpi r16, TTYONUART1_IFACENUM
brne addMsgToInterface_end
ldi yl, LOW(comOnUart0_iface)
ldi yh, HIGH(comOnUart0_iface)
rjmp NET_Interface_AddOutgoingMsgNum ; try to add msg to interface
addMsgToInterface_end:
ret
; @end
sendDebug:
ldi yl, LOW(ttyOnUart1_iface)
ldi yh, HIGH(ttyOnUart1_iface)
lds r24, debugMsgCounter
lds r25, debugMsgCounter+1
sbiw r25:r24, 1
brne sendDebug_storeCounter
; send device msg
rcall NET_Buffer_Alloc ; (R16, R17, X)
brcc sendDebug_end
push r16
adiw xh:xl, 1
rcall writeDebugMsg
sbiw xh:xl, 1
pop r16
rcall NET_Interface_AddOrReleaseOutMsg ; (R16, R17, R18, X)
brcc sendDebug_end
; reset counter
sendDebug_resetCounter:
ldi r24, LOW(SEND_DEBUG_EVERY)
ldi r25, HIGH(SEND_DEBUG_EVERY)
sendDebug_storeCounter:
sts debugMsgCounter, r24
sts debugMsgCounter+1, r25
sendDebug_end:
ret
writeDebugMsg:
push yl
push yh
ldi yl, LOW(netBuffers)
ldi yh, HIGH(netBuffers)
rcall writeBufferInfoToRegs
mov r0, r17
mov r1, r18
adiw yh:yl, NET_BUFFERS_SIZE
rcall writeBufferInfoToRegs
mov r2, r17
mov r3, r18
adiw yh:yl, NET_BUFFERS_SIZE
rcall writeBufferInfoToRegs
mov r4, r17
mov r5, r18
adiw yh:yl, NET_BUFFERS_SIZE
rcall writeBufferInfoToRegs
mov r6, r17
mov r7, r18
adiw yh:yl, NET_BUFFERS_SIZE
rcall writeBufferInfoToRegs
mov r8, r17
mov r9, r18
adiw yh:yl, NET_BUFFERS_SIZE
rcall writeBufferInfoToRegs
mov r10, r17
mov r11, r18
adiw yh:yl, NET_BUFFERS_SIZE
clr r12
clr r13
push xl
push xh
rcall NET_Buffer_CountUsed
pop xh
pop xl
mov r14, r16
pop yh
pop yl
rcall NETMSG_Debug_Write ; (R16, R17, R18, R19, R20, R21, Z)
ret
writeBufferInfoToRegs:
ldi r17, 0xff
ldi r18, 0xff
ld r16, Y
andi r16, 0x80
breq writeBufferInfoToRegs_end
ldd r17, Y+(1+2) ; cmd code
ldd r18, Y+(1+3) ; source addr
writeBufferInfoToRegs_end:
ret
DEBUG1:
ldi r19, 10
ldi r20, 2
@@ -534,6 +683,7 @@ programRamBegin:
sendTStatsCounter: .byte 2
sendRStatsCounter: .byte 2
sendMStatsCounter: .byte 2
debugMsgCounter: .byte 2
programRamEnd: