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avr: fixed module cny70 (basically works now).

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This commit is contained in:
Martin Preuss
2024-09-11 01:35:24 +02:00
parent 85d7ccf0f2
commit 2de89ecc96
1 changed files with 13 additions and 16 deletions
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29
avr/modules/cny70/main.asm
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@@ -53,17 +53,18 @@ CNY70_Init:
ldi r17, (cny70DataEnd-cny70DataBegin)
rcall Utils_FillSram
; setup pins and interrupts
sbi CNY70_DDR_LED, CNY70_PINNUM_LED ; set DATA port as output
sbi CNY70_PORT_LED, CNY70_PINNUM_LED ; LED off
cbi CNY70_PORT_ADC, CNY70_PINNUM_ADC ; disable internal pullup for ADC
cbi CNY70_DDR_ADC, CNY70_PINNUM_ADC ; set ADC port as input
; setup pins
sbi CNY70_DDR_LED, CNY70_PINNUM_LED ; set DATA port as output
sbi CNY70_PORT_LED, CNY70_PINNUM_LED ; LED off
cbi CNY70_PORT_ADC, CNY70_PINNUM_ADC ; disable internal pullup for ADC
cbi CNY70_DDR_ADC, CNY70_PINNUM_ADC ; set ADC port as input
ldi r16, (1 << CNY70_MUX_ADC) ; select input pin, use Vcc as reference voltage
ldi r16, CNY70_MUX_ADC ; select input pin, use Vcc as reference voltage
out ADMUX, r16
sbi ADCSRB, ADLAR ; left shift result for 8-bit representation in ADCH
ldi r16, (1 << ADEN) | (1 << ADPS1) | (1 << ADPS0) ; enable, prescaler 8
ldi r16, (1 << ADLAR)
out ADCSRB, r16
ldi r16, (1 << ADEN) | (1 << ADPS1) | (1 << ADPS0) ; enable, prescaler 8
out ADCSRA, r16
sec
ret
@@ -77,7 +78,6 @@ CNY70_Fini:
CNY70_Run:
ret ; DEBUG (doesn't change things)
lds r16, cny70Flags
andi r16, CNY70_FLAGS_ADC_UPDATED ; new value?
breq CNY70_Run_done ; nope, jump
@@ -97,8 +97,8 @@ CNY70_OnTimer:
andi r16, CNY70_FLAGS_ADC_STARTED
breq CNY70_OnTimer_startConversion
; conversion is running, complete?
sbis ADCSRA, ADSC
ret ; only if bit clear
sbic ADCSRA, ADSC
ret ; only if bit still set
; conversion complete, read value, set flags
lds r16, cny70Flags
@@ -114,14 +114,11 @@ CNY70_OnTimer:
ret
CNY70_OnTimer_startConversion:
cbi CNY70_PORT_LED, CNY70_PINNUM_LED ; LED on
lds r16, cny70Flags
ori r16, CNY70_FLAGS_ADC_STARTED
sts cny70Flags, r16
cbi CNY70_PORT_LED, CNY70_PINNUM_LED ; LED on
nop
nop
nop
sbic ADCSRA, ADSC ; start conversion
sbi ADCSRA, ADSC ; start conversion
ret