From 10e4aa8f85f32e4c2e34e58159fd17a7014885a1 Mon Sep 17 00:00:00 2001
From: Martin Preuss <martin@aquamaniac.de>
Date: Sat, 17 May 2025 13:18:50 +0200
Subject: [PATCH] fixed a problem with m8515 UART.

UBRRH and UCSRC share the same io register location, bit URSEL needs to
be set in order to access UCSRC!!
---
 avr/modules/flash/io_uart_all_attn.asm | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/avr/modules/flash/io_uart_all_attn.asm b/avr/modules/flash/io_uart_all_attn.asm
index c503229..740f3bc 100644
--- a/avr/modules/flash/io_uart_all_attn.asm
+++ b/avr/modules/flash/io_uart_all_attn.asm
@@ -37,8 +37,13 @@ ioRawInit:
   M_IO_WRITE UART_REG_UBRRL, r16
 
   ; set character format (asynchronous USART, 8-bit, one stop bit, no parity)
-  ldi r16, (1<<UART_BIT_UCSZ0) | (1<<UART_BIT_UCSZ1)
-  sts UART_REG_UCSRC, r16
+.ifdef URSEL
+  ldi r16, (1<<URSEL) | (1<<UART_BIT_USBS) | (3<<UART_BIT_UCSZ0)
+.else
+  ldi r16, (1<<UART_BIT_USBS)|(3<<UART_BIT_UCSZ0)
+.endif
+;  ldi r16, (1<<UART_BIT_UCSZ0) | (1<<UART_BIT_UCSZ1)
+  M_IO_WRITE UART_REG_UCSRC, r16
 
   cbi COM_ATTN_DDR, COM_ATTN_PIN          ; set ATTN port as input