avr/uart_hw: tty1 works in send and receive direction.

This commit is contained in:
Martin Preuss
2025-03-22 13:00:20 +01:00
parent 236f6832a3
commit 0f598a5552
5 changed files with 206 additions and 141 deletions

View File

@@ -232,7 +232,7 @@ ttyOnUart1RunWriteModes:
; ---------------------------------------------------------------------------
; @routine ttyOnUart1RunIdle
; @routine ttyOnUart1RunWriteIdle
;
; @clobbers
@@ -243,7 +243,6 @@ ttyOnUart1RunWriteIdle:
rcall NET_Interface_GetNextOutgoingMsgNum ; (R17, R18, X)
brcc ttyOnUart1RunWriteIdle_end
rcall NET_Buffer_Locate ; (R17)
brcc ttyOnUart1RunWriteIdle_end
rcall TtyOnUart1_SendBuffer ; (R16, R17)
ttyOnUart1RunWriteIdle_end:
ret
@@ -267,7 +266,31 @@ ttyOnUart1RunWriting:
; @clobbers none
ttyOnUart1RunWaitBufferEmpty:
; TODO: check for timeout etc.
ldd r16, Y+UART_HW_IFACE_OFFS_WRITEBUFNUM
ldi r17, 0xff
cp r16, r17
breq ttyOnUart1RunWaitBufferEmpty_checkHardware
std Y+UART_HW_IFACE_OFFS_WRITEBUFNUM, r17
rcall NET_Buffer_ReleaseByNum ; (R16, X)
ttyOnUart1RunWaitBufferEmpty_checkHardware:
lds r16, UCSR1A
sbrs r16,TXC1
rjmp ttyOnUart1RunWaitBufferEmpty_checkTimer ; bit still clear, go check timer
ldi r16, UART_HW_WRITEMODE_WRITEBUFFEREMPTY ; bit is set, change mode to WRITEBUFFEREMPTY
std Y+UART_HW_IFACE_OFFS_WRITEMODE, r16
rjmp ttyOnUart1RunWaitBufferEmpty_end
ttyOnUart1RunWaitBufferEmpty_checkTimer:
ldd r16, Y+NET_IFACE_OFFS_WRITETIMER
cpi r16, 10
brcs ttyOnUart1RunWaitBufferEmpty_end
rcall UART_HW_Uart1_StopTx ; disable transceiver and interrupts (R16)
ldi r16, NET_IFACE_OFFS_ERR_COLLISIONS_LOW
rcall NET_Interface_IncCounter16 ; (R24, R25)
ttyOnUart1RunWaitBufferEmpty_enterIdle:
ldi r16, UART_HW_WRITEMODE_IDLE
std Y+UART_HW_IFACE_OFFS_WRITEMODE, r16
ttyOnUart1RunWaitBufferEmpty_end:
ret
; @end
@@ -279,13 +302,6 @@ ttyOnUart1RunWaitBufferEmpty:
; @clobbers R16, R17, X (R24, R25)
ttyOnUart1RunWriteBufferEmpty:
ldd r16, Y+UART_HW_IFACE_OFFS_WRITEBUFNUM
ldi r17, 0xff
cp r16, r17
breq ttyOnUart1RunWriteBufferEmpty_setIdle
std Y+UART_HW_IFACE_OFFS_WRITEBUFNUM, r17
rcall NET_Buffer_ReleaseByNum ; (R16, X)
ttyOnUart1RunWriteBufferEmpty_setIdle:
rcall UART_HW_Uart1_StopTx ; disable transceiver and interrupts (R16)
ldi r16, UART_HW_WRITEMODE_IDLE
std Y+UART_HW_IFACE_OFFS_WRITEMODE, r16
@@ -322,14 +338,8 @@ ttyOnUart1RunReadModes:
; @clobbers R16 (R17, R24, R25, X)
ttyOnUart1RunReadIdle:
ldd r16, Y+UART_HW_IFACE_OFFS_READBUFNUM
cpi r16, 0xff
brne ttyOnUart1RunReadIdle_enterReading
rcall NET_Buffer_Alloc ; (R16, R17, X)
rcall UART_HW_Interface_EnsureReadBuffer ; (R16, R17, R24, R25, X)
brcc ttyOnUart1RunReadIdle_noBuf
rcall UART_HW_Interface_SetReadBuffer ; (R17)
rcall NET_Interface_SetIfaceNumInBuffer ; (R16, R17)
ttyOnUart1RunReadIdle_enterReading:
ldi r16, UART_HW_READMODE_READING
std Y+UART_HW_IFACE_OFFS_READMODE, r16
rcall UART_HW_Uart1_StartRx ; R16
@@ -376,22 +386,19 @@ ttyOnUart1RunSkipping_end:
; @clobbers R16 (R17, R18, R24, R25)
ttyOnUart1RunMsgReceived:
ldi r17, 0xff
ldd r16, Y+UART_HW_IFACE_OFFS_READBUFNUM
cpi r16, 0xff
breq ttyOnUart1RunMsgReceived_end
rcall NET_AddIncomingMsgNum ; (R17, R18, X)
brcs ttyOnUart1RunMsgReceived_enterIdle
ttyOnUart1RunMsgReceived_overrun:
rcall NET_Buffer_ReleaseByNum ; (R16, X)
std Y+UART_HW_IFACE_OFFS_READBUFNUM, r17
rcall NET_AddIncomingMsgNum ; (R17, R18, X)
brcs comOnUart1RunMsgReceived_enterIdle
; could not add msg
rcall NET_Buffer_ReleaseByNum ; (R16, X)
ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
rcall NET_Interface_IncCounter16 ; (R24, R25)
ttyOnUart1RunMsgReceived_enterIdle:
ldi r16, 0xff
std Y+UART_HW_IFACE_OFFS_READBUFNUM, r16
ldi r16, UART_HW_READMODE_IDLE
std Y+UART_HW_IFACE_OFFS_READMODE, r16
ttyOnUart1RunMsgReceived_end:
rcall NET_Interface_IncCounter16 ; (R24, R25)
comOnUart1RunMsgReceived_enterIdle:
rcall UART_HW_Interface_EnsureReadBuffer ; (R16, R17, R24, R25, X)
ldi r17, UART_HW_READMODE_IDLE
std Y+UART_HW_IFACE_OFFS_READMODE, r17 ; set read mode
ret
; @end