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split uart_bitbang2 into multiple files.

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This commit is contained in:
Martin Preuss
2025-05-30 17:03:35 +02:00
parent f1c858e3a7
commit 0b8cb929b7
6 changed files with 205 additions and 172 deletions
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3
avr/devices/all/includes.asm
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@@ -54,7 +54,8 @@
#ifdef MODULES_UART_BITBANG
.include "modules/uart_bitbang2/defs.asm"
.include "modules/uart_bitbang2/iface.asm"
.include "modules/uart_bitbang2/lowlevel.asm"
.include "modules/uart_bitbang2/bytelevel.asm"
.include "modules/uart_bitbang2/msglevel.asm"
#endif
#ifdef MODULES_UART_HW

4
avr/modules/network/defs.asm
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@@ -40,8 +40,8 @@
.equ NET_IFACE_OFFS_ERR_IO_HIGH = 15
.equ NET_IFACE_OFFS_ERR_NOBUF_LOW = 16
.equ NET_IFACE_OFFS_ERR_NOBUF_HIGH = 17
.equ NET_IFACE_OFFS_HANDLED_LOW = 18
.equ NET_IFACE_OFFS_HANDLED_HIGH = 19
.equ NET_IFACE_OFFS_ERR_MSGSIZE_LOW = 18
.equ NET_IFACE_OFFS_ERR_MSGSIZE_HIGH = 19
.equ NET_IFACE_OFFS_ERR_MISSED_LOW = 20
.equ NET_IFACE_OFFS_ERR_MISSED_HIGH = 21

3
avr/modules/uart_bitbang2/0BUILD
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@@ -3,10 +3,11 @@
<gwbuild>
<extradist>
bytelevel.asm
defs.asm
iface.asm
lowlevel.asm
main.asm
msglevel.asm
</extradist>
</gwbuild>

123
avr/modules/uart_bitbang2/lowlevel.asm → avr/modules/uart_bitbang2/bytelevel.asm
View File

@@ -10,7 +10,9 @@
; ***************************************************************************
; code
; macros
; ---------------------------------------------------------------------------
; @macro UART_BB_M_WAIT_FOR_PIN_LOW IN_REG_DATA, IN_PINNUM
@@ -66,7 +68,10 @@ l_end:
; ***************************************************************************
; code
.cseg
; ---------------------------------------------------------------------------
@@ -102,17 +107,14 @@ uartBitbang_SendByte_setLow:
Utils_WaitNanoSecs COM_BIT_LENGTH, 11, r22
rjmp uartBitbang_SendByte_loopEnd ; +2
uartBitbang_SendByte_setHigh:
#if 0
cbi COM_DATA_DDR, COM_DATA_PIN ; +2 set DATA as input, pullup R makes it ONE
nop ; +1 (to make pin change available)
Utils_WaitNanoSecs COM_HALFBIT_LENGTH, 0, r22 ; wait for half a bit length for line to safely settle
sbis COM_DATA_INPUT, COM_DATA_PIN ; +1 if no skip, +2 if skipped
rjmp uartBitbang_SendByte_error ; +2 if error (collision: we wanted line to be high but it is low)
Utils_WaitNanoSecs COM_HALFBIT_LENGTH, 11, r22
#else
cbi COM_DATA_DDR, COM_DATA_PIN ; +2 set DATA as input, pullup R makes it ONE
Utils_WaitNanoSecs COM_BIT_LENGTH, 8, r22
#endif
uartBitbang_SendByte_loopEnd:
dec r21 ; +1
brne uartBitbang_SendByte_loop ; +2, sum per loop: 11 cycles
@@ -219,118 +221,6 @@ uartBitbang_WaitForAttnHigh:
; ---------------------------------------------------------------------------
; @routine uartBitbang_ReceivePacketIntoBuffer
;
; Receive a packet into buffer pointed to by X.
; Expects interrupts to be disabled.
;
; @param R16 COM address to listen to
; @param R17 maximum value for accepted msg data (i.e. buffersize minus 3)
; @param X buffer to receive to
; @return CFLAG set if okay (packet received), cleared on error
; @return R16 error code if CFLAG is cleared (COM2_ERROR_NOTFORME, COM2_ERROR_IOERROR, COM2_ERROR_DATAERROR)
; @clobbers: r16, r17, r18, X (r19, r20, r21, r22)
uartBitbang_ReceivePacketIntoBuffer:
mov r18, r17
push r16
; read destination address
rcall uartBitbang_ReceiveByte ; read byte (R16, R17, R20, R21, R22)
pop r17 ; pop from R16 to R17
brcc uartBitbang_ReceivePacketIntoBuffer_ioError
#ifndef COM_ACCEPT_ALL_DEST ; accept every destination address
; compare destination address (accept "FF" and own address)
cp r16, r17
breq uartBitbang_ReceivePacketIntoBuffer_acceptAddr
cpi r16, 0xff
breq uartBitbang_ReceivePacketIntoBuffer_acceptAddr
clr r16
rjmp uartBitbang_ReceivePacketIntoBuffer_error ; clc/ret
#endif
uartBitbang_ReceivePacketIntoBuffer_acceptAddr:
st X+, r16 ; store dest address, lock buffer
; read msg length
rcall uartBitbang_ReceiveByte ; read packet length (R16, R17, R20, R21, R22)
brcc uartBitbang_ReceivePacketIntoBuffer_ioError
st X+, r16
cp r16, r18 ; (COM2_BUFFER_SIZE-3)
brcc uartBitbang_ReceivePacketIntoBuffer_contentError ; packet too long
inc r16 ; account for checksum byte
mov r17, r16
uartBitbang_ReceivePacketIntoBuffer_loop:
push r17
rcall uartBitbang_ReceiveByte ; read byte (R16, R17, R20, R21, R22)
pop r17
brcc uartBitbang_ReceivePacketIntoBuffer_ioError
st X+, r16
dec r17
brne uartBitbang_ReceivePacketIntoBuffer_loop
sec
ret
uartBitbang_ReceivePacketIntoBuffer_ioError:
ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
rjmp uartBitbang_ReceivePacketIntoBuffer_error
uartBitbang_ReceivePacketIntoBuffer_contentError:
ldi r16, NET_IFACE_OFFS_ERR_CONTENT_LOW
uartBitbang_ReceivePacketIntoBuffer_error:
clc
ret
; @end
; ---------------------------------------------------------------------------
; @routine uartBitbang_SendPacket
;
; Send packet over wire, handle ATTN line.
;
; @param X ptr to buffer to send
; @return CFLAGS set if okay, cleared otherwise (index of error variable in R16)
; @return R16 index of error variable (if CFLAGS cleared)
; @clobbers R16, R22 (R17, R21, X)
uartBitbang_SendPacket:
rcall uartBitbang_AcquireBus
brcc uartBitbang_SendPacket_lineBusyError
rcall uartBitbang_WaitForOneBitLength ; wait for one bit duration (R22)
rcall uartBitbang_WaitForOneBitLength ; wait for one bit duration (R22)
rcall uartBitbang_WaitForOneBitLength ; wait for one bit duration (R22)
adiw xh:xl, NETMSG_OFFS_MSGLEN
ld r17, X
sbiw xh:xl, NETMSG_OFFS_MSGLEN
inc r17 ; account for dest addr
inc r17 ; account for msglen byte
inc r17 ; account for crc byte
uartBitbang_SendPacket_loop:
rcall uartBitbang_WaitForOneBitLength ; wait for one bit duration (R22)
ld r16, X+
rcall uartBitbang_SendByte ; send byte (R16, R21, R22)
brcc uartBitbang_SendPacket_releaseBusRet
dec r17
brne uartBitbang_SendPacket_loop
sec
uartBitbang_SendPacket_releaseBusRet:
cbi COM_ATTN_DDR, COM_ATTN_PIN ; release ATTN line (by setting direction to IN)
brcc uartBitbang_SendPacket_ioError
; packet successfully sent
ret
uartBitbang_SendPacket_ioError:
ldi r16, NET_IFACE_OFFS_ERR_COLLISIONS_LOW
ret
uartBitbang_SendPacket_lineBusyError:
ldi r16, NET_IFACE_OFFS_ERR_BUSY_LOW
ret
; @end
; ---------------------------------------------------------------------------
; @routine uartBitbang_AcquireBus
;
@@ -373,3 +263,4 @@ uartBitbang_WaitForOneBitLength:

69
avr/modules/uart_bitbang2/iface.asm
View File

@@ -123,7 +123,7 @@ uartBitBang_sendNextPkg:
rcall NET_Buffer_Locate ; get pointer to buffer (R17)
brcc uartBitBang_sendNextPkg_end
adiw xh:xl, 1 ; skip buffer header
rcall uartBitbang_SendPacket ; (R16, R17, R21, R22, X)
rcall uartBitbang_SendMsg ; (R16, R17, R21, R22, X)
brcc uartBitBang_sendNextPkg_error
rcall NET_Interface_GetNextOutgoingMsgNum ; remove from stack (R17, R18, X)
rcall NET_Buffer_ReleaseByNum ; release buffer (R16, X)
@@ -144,73 +144,38 @@ uartBitBang_sendNextPkg_end:
;
; Receive packet.
;
; @return CFLAG set if okay (packet received), cleared on error
; @clobbers R16, R17, X (R18, R19, R20, R21, R22, R24, R25)
; @param Y pointer to start of interface data
; @clobbers R16, R17, R18, R19, R20, R21, R22, R24, R25, X
uartBitbang_receiveNextPkg:
rcall NET_Buffer_Alloc ; (R16, R17, X)
rcall NET_Buffer_Alloc ; R16=buffer num (R16, R17, X)
brcs uartBitbang_receiveNextPkg_gotBuffer
ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
rcall NET_Interface_IncCounter16 ; (R24, R25)
clc
rjmp uartBitbang_receiveNextPkg_end
uartBitbang_receiveNextPkg_gotBuffer:
push r16 ; buffer number
adiw xh:xl, 1
rcall uartBitbang_receiveAndCheckPkg ; (r16, r17, r18, r19, r20, r21, r22, X)
pop r17 ; pop buffer number to R17
brcs uartBitbang_receiveNextPkg_gotPkg
tst r16 ; error code=0: pkg not for me
breq uartBitbang_receiveNextPkg_RelBuffer
uartBitbang_receiveNextPkg_incCntRelBuffer:
rcall NET_Interface_IncCounter16 ; (R24, R25)
uartBitbang_receiveNextPkg_RelBuffer:
mov r16, r17
rcall NET_Buffer_ReleaseByNum ; (R16, X)
clc
rjmp uartBitbang_receiveNextPkg_end
uartBitbang_receiveNextPkg_gotPkg:
mov r16, r17
ldd r18, Y+NET_IFACE_OFFS_ADDRESS
ldi r19, NET_BUFFERS_SIZE-1
rcall uartBitbang_ReceiveAndCheckMsg ; (R16, R17, R19, R20, R21, R22, R24, R25)
pop r16
brcc uartBitbang_receiveNextPkg_relBuffer
rcall NET_AddIncomingMsgNum ; (R17, R18, X)
ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
brcc uartBitbang_receiveNextPkg_incCntRelBuffer
ldi r16, NET_IFACE_OFFS_PACKETSIN_LOW
rcall NET_Interface_IncCounter16 ; (R24, R25)
sec
brcs uartBitbang_receiveNextPkg_end
push r16
ldi r16, NET_IFACE_OFFS_ERR_MISSED_LOW
rcall NET_Interface_IncCounter16 ; (R24, R25)
pop r16
; fall-through to release buffer
uartBitbang_receiveNextPkg_relBuffer:
rcall NET_Buffer_ReleaseByNum ; (R16, X)
uartBitbang_receiveNextPkg_end:
ret
; @end
; ---------------------------------------------------------------------------
; @routine uartBitbang_receiveAndCheckPkg
;
; Receive a packet into buffer pointed to by X and CRC check it.
; Expects interrupts to be disabled.
;
; @param X buffer to receive to
; @param Y pointer to start of interface data
; @return CFLAG set if okay (packet received), cleared on error
; @return R16 error var offset if CFLAG is cleared
; @clobbers: r16 (r17, r18, r19, r20, r21, r22, X)
uartBitbang_receiveAndCheckPkg:
ldd r16, Y+NET_IFACE_OFFS_ADDRESS
ldi r17, (NET_BUFFERS_SIZE-4)
push xl
push xh
rcall uartBitbang_ReceivePacketIntoBuffer ; (r16, r17, r18, r19, r20, r21, r22, X)
pop xh
pop xl
brcc uartBitbang_receiveAndCheckPkg_end
rcall NETMSG_CheckMessageInBuffer ; (R16, R17, R18, R19, R20, X)
ldi r16, NET_IFACE_OFFS_ERR_CONTENT_LOW
uartBitbang_receiveAndCheckPkg_end:
ret
; @end

175
avr/modules/uart_bitbang2/msglevel.asm Normal file
View File

@@ -0,0 +1,175 @@
; ***************************************************************************
; copyright : (C) 2025 by Martin Preuss
; email : martin@libchipcard.de
;
; ***************************************************************************
; * This file is part of the project "AqHome". *
; * Please see toplevel file COPYING of that project for license details. *
; ***************************************************************************
; ***************************************************************************
; code
; ---------------------------------------------------------------------------
; @routine uartBitbang_ReceiveAndCheckMsg
;
; Receive a packet into buffer pointed to by X.
; Expects interrupts to be disabled.
;
; @param R18 COM address to listen to
; @param R19 max buffer size
; @param X buffer to receive to
; @return CFLAG set if msg received, cleared on error
; @clobbers R16, R19 (R17, R20, R21, R22, R24, R25)
uartBitbang_ReceiveAndCheckMsg:
push xl
push xh
rcall uartBitbang_RawReceiveMsg ; (R16, R17, R19, R20, R21, R22, R24, R25, X)
pop xh
pop xl
brcs uartBitbang_ReceiveAndCheckMsg_recvd
; fall-through, return with CF cleared (from uartBitbang_RawReceiveMsg)
ret
uartBitbang_ReceiveAndCheckMsg_recvd:
push xl
push xh
rcall NETMSG_CheckMessageInBuffer ; (R16, R17, R18, R19, R20, X)
pop xh
pop xl
brcs uartBitbang_ReceiveAndCheckMsg_msgOk
ldi r16, NET_IFACE_OFFS_ERR_CONTENT_LOW
rcall NET_Interface_IncCounter16 ; (R24, R25)
clc
ret
uartBitbang_ReceiveAndCheckMsg_msgOk:
ldi r16, NET_IFACE_OFFS_PACKETSIN_LOW
rcall NET_Interface_IncCounter16 ; (R24, R25)
sec
ret
; @end
; ---------------------------------------------------------------------------
; @routine uartBitbang_RawReceiveMsg
;
; Receive a packet into buffer pointed to by X.
; Expects interrupts to be disabled.
;
; @param R18 COM address to listen to
; @param R19 max buffer size
; @param X buffer to receive to
; @return CFLAG set if msg received, cleared on error (see R16)
; @return R16 if CFLAG cleared: 0=message not for this node, otherwise error
; @clobbers R16, R19 (R17, R20, R21, R22, R24, R25, X)
uartBitbang_RawReceiveMsg:
cpi r19, 3
brcs uartBitbang_RawReceiveMsg_eBadSize
; read destination address
rcall uartBitbang_ReceiveByte ; read byte (R16, R17, R20, R21, R22)
brcc uartBitbang_RawReceiveMsg_eIo
cp r16, r18
breq uartBitbang_RawReceiveMsg_forMe
cpi r16, 0xff
breq uartBitbang_RawReceiveMsg_forMe
clr r16
rjmp uartBitbang_RawReceiveMsg_clcRet
uartBitbang_RawReceiveMsg_forMe:
subi r19, 1
brcs uartBitbang_RawReceiveMsg_eBadSize
st X+, r16
; read size of msg payload (e.g. number of msg bytes following minus CRC byte)
rcall uartBitbang_ReceiveByte ; read byte (R16, R17, R20, R21, R22)
brcc uartBitbang_RawReceiveMsg_eIo
inc r16 ; account for crc byte
subi r19, 1
brcs uartBitbang_RawReceiveMsg_eBadSize
st X+, r16 ; store msg payload size
sub r19, r16 ; check msg size against remaining buffer size
brcs uartBitbang_RawReceiveMsg_eBadSize
mov r19, r16
uartBitbang_RawReceiveMsg_loop:
rcall uartBitbang_ReceiveByte ; read byte (R16, R17, R20, R21, R22)
brcc uartBitbang_RawReceiveMsg_eIo
st X+, r16 ; store msg
dec r19
brne uartBitbang_RawReceiveMsg_loop
sec
rjmp uartBitbang_RawReceiveMsg_end
uartBitbang_RawReceiveMsg_eBadSize:
ldi r16, NET_IFACE_OFFS_ERR_MSGSIZE_LOW
rjmp uartBitbang_RawReceiveMsg_incCounterRet
uartBitbang_RawReceiveMsg_eIo:
ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
uartBitbang_RawReceiveMsg_incCounterRet:
rcall NET_Interface_IncCounter16 ; (R24, R25)
uartBitbang_RawReceiveMsg_clcRet:
clc
uartBitbang_RawReceiveMsg_end:
ret
; @end
; ---------------------------------------------------------------------------
; @routine uartBitbang_SendMsg
;
; Send packet over wire, handle ATTN line.
;
; @param X ptr to buffer to send
; @return CFLAGS set if okay, cleared otherwise (index of error variable in R16)
; @return R16 index of error variable (if CFLAGS cleared)
; @clobbers R16, R22 (R17, R21, X)
uartBitbang_SendMsg:
rcall uartBitbang_AcquireBus
brcc uartBitbang_SendMsg_lineBusyError
rcall uartBitbang_WaitForOneBitLength ; wait for one bit duration (R22)
rcall uartBitbang_WaitForOneBitLength ; wait for one bit duration (R22)
rcall uartBitbang_WaitForOneBitLength ; wait for one bit duration (R22)
adiw xh:xl, NETMSG_OFFS_MSGLEN
ld r17, X
sbiw xh:xl, NETMSG_OFFS_MSGLEN
inc r17 ; account for dest addr
inc r17 ; account for msglen byte
inc r17 ; account for crc byte
uartBitbang_SendMsg_loop:
rcall uartBitbang_WaitForOneBitLength ; wait for one bit duration (R22)
ld r16, X+
rcall uartBitbang_SendByte ; send byte (R16, R21, R22)
brcc uartBitbang_SendMsg_releaseBusRet
dec r17
brne uartBitbang_SendMsg_loop
sec
uartBitbang_SendMsg_releaseBusRet:
cbi COM_ATTN_DDR, COM_ATTN_PIN ; release ATTN line (by setting direction to IN)
brcc uartBitbang_SendMsg_ioError
; packet successfully sent
ret
uartBitbang_SendMsg_ioError:
ldi r16, NET_IFACE_OFFS_ERR_COLLISIONS_LOW
ret
uartBitbang_SendMsg_lineBusyError:
ldi r16, NET_IFACE_OFFS_ERR_BUSY_LOW
ret
; @end