; ***************************************************************************
; Source file for base system node on AtTiny 84
;
; This is for the maintenance system (i.e. the flash loader).
;
; All definitions and changes should go into this file.
; ***************************************************************************

;.equ clock=1000000 ; Define the clock frequency
.equ clock=8000000 ; Define the clock frequency

.nolist
.include "include/tn841def.inc" ; Define device ATtiny841
.list

.include "version.asm"
.include "../defs.asm"
.include "devices/all/defs.asm"

.include "common/calls.asm"
.include "common/utils_wait.asm"



; ***************************************************************************
; defines


;#define COM_ACCEPT_ALL_DEST 1



; ---------------------------------------------------------------------------
; LED

.equ LED_DDR             = DDRB
.equ LED_PORT            = PORTB
.equ LED_PIN             = PINB
.equ LED_PINNUM          = PORTB2


; ***************************************************************************
; code segment

.cseg
.org 0x0000



; ---------------------------------------------------------------------------
; Reset and interrupt vectors

        rjmp main                 ;  1: RESET             Reset vector  use this for flashed system
	reti                      ;  2: INT0              External Interrupt Request 0
	reti                      ;  3: PCINT0            Pin Change Interrupt 0
	reti                      ;  4: PCINT1            Pin Change Interrupt 1
	reti                      ;  5: WDT               Watchdog Time-out
	reti                      ;  6: TIM1_CAPT         Timer/Counter1 Capture Event
	reti                      ;  7: TIM1_COMPA (OC1A) Timer/Counter1 Compare Match A
	reti                      ;  8: TIM1_COMPB (OC1B) Timer/Counter1 Compare Match B
	reti                      ;  9: TIM1_OVF (OVF1)   Timer/Counter1 Overflow
        reti                      ; 10: TIM0_COMPA (OC0A) Timer/Counter0 Compare Match A
	reti                      ; 11: TIM0_COMPB (OC0B) Timer/Counter0 Compare Match B
	reti                      ; 12: TIM0_OVF (OVF0)   Timer/Counter0 Overflow
	reti                      ; 13: ANA_COMP0         Analog Comparator 0
        reti                      ; 14: ADC_READY         ADC Conversion Complete
        reti                      ; 15: EE_RDY (ERDY)     EEPROM Ready
        reti                      ; 16: ANA_COMP1         Analog Comparator 1
        reti                      ; 17: TIM2_CAPT         Timer/Counter2 Capture Event
        reti                      ; 18: TIM2_COMPA (OC2A) Timer/Counter2 Compare Match A
        reti                      ; 19: TIM2_COMPB (OC2B) Timer/Counter2 Compare Match B
        reti                      ; 20: TIM2_OVF (OVF2)   Timer/Counter2 Overflow
        reti                      ; 21: SPI               SPI Serial Transfer Complete
        reti                      ; 22: USART0_RXS        USART0 Rx Start
        reti                      ; 23: USART0_RXC        USART0 Rx Complete
        reti                      ; 24: USART0_DRE        USART0 Data Register Empty
        reti                      ; 25: USART0_TXC        USART0 Tx Complete
        reti                      ; 26: USART1_RXS        USART1 Rx Start
        reti                      ; 27: USART1_RXC        USART1 Rx Complete
        reti                      ; 28: USART1_DRE        USART1 Data Register Empty
        reti                      ; 29: USART1_TXC        USART1 Tx Complete
        reti                      ; 30: TWI               Two-Wire-Interface
        reti                      ; 31: RESERVED          reserved



devInfoBlock:        ; 12 bytes
devInfoManufacturer: .db 'A', 'Q', 'U', 'A'
devInfoId:           .db DEVICEINFO_ID, 0
devInfoVersion:      .db DEVICEINFO_VERSION, DEVICEINFO_REVISION             ; version, revision
firmwareVersion:     .db FIRMWARE_VARIANT_BOOT, FIRMWARE_VERSION_MAJOR
                     .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL

firmwareStart:
  rjmp main ; will be overwritten when flashing



; ***************************************************************************
; main code


.org BOOTLOADER_ADDR


main:
  rjmp bootLoader ; this routine is in modules/bootloader/main.asm




; ***************************************************************************
; includes

.include "common/utils_wait_fixed.asm"
.include "common/utils_copy_from_flash.asm"
.include "common/utils_copy_sdram.asm"
.include "modules/flash/defs.asm"
.include "modules/flash/eeprom.asm"
.include "modules/flash/io.asm"
.include "modules/flash/io_uart1.asm"
.include "modules/flash/io_uart_all.asm"
.include "modules/flash/flashxp.asm"
.include "modules/flash/flash4p.asm"
.include "modules/flash/flashprocess.asm"
.include "modules/flash/wait.asm"
.include "modules/bootloader/main.asm"
.include "modules/network/msg/defs.asm"
.include "modules/network/msg/crc.asm"



systemSetSpeed:
.if clock == 1000000
  ldi r17, 0xd8
  ldi r16, (1<<CLKPS1) | (1<<CLKPS0) ; SUT=0, CLKPS=0011b
  sts CCP, r17
  sts CLKPR, r16
.endif

.if clock == 8000000
  ldi r17, 0xd8
  clr r16           ; SUT=0, CLKPS=0
  sts CCP, r17
  sts CLKPR, r16
.endif
  ret



